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研究生:吳丕安
研究生(外文):Wu Pi-An
論文名稱:具正交相位輸出的CMOS射頻頻率合成器
論文名稱(外文):CMOS RF Frequency Synthesizers with Quadrature Phase Outputs
指導教授:高曜煌
指導教授(外文):Kao Yao-Huang
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電信工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:72
中文關鍵詞:頻率合成器正交壓控振盪器預除器
外文關鍵詞:Frequency SynthesizersQuadratureVCOPrescaler
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  • 被引用被引用:4
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本論文在使用全積體化金氧半製程,實現規格符合DCS-1800規範的具正交輸出訊號的頻率合成器,可用於低中頻架構的射頻接收機。低中頻接收機的射頻鏡像頻率消除,在於是否能產生精確地I、Q訊號源,即頻率穩定、振幅大小相同、相位差固定九十度。基於以上三點考量,首先設計壓控振盪器,採用線性時變系統分析相位雜訊。正交產生電路方面,使用兩種電路設計,第一種電路採用兩組VCO耦合對 ,第二種電路採用多相位濾波器架構。最後設計頻率合成器,以產生頻率穩定的訊號源。整體電路使用TSMC 0.35微米金氧半製成,透過國家晶片中心(CIC)下線製作。
The purpose of this paper is to study fully integrated CMOS frequency synthesizer with quadrature phase outputs, for DCS1800 applications. The synthesizer has the capability of low phase noise and quadrature phase output for low IF receiver. The crucial points are frequency accuracy, equal amplitude and quadrature phase. The phase noise is examined by the linear time varying model . As for quadrature phase, two kinds of circuits are employed. One is the VCO coupled pairs, and the other is poly-phase architecture. The entire circuits are tapeouted by CIC, which using the TSMC 0.35um process to manufactured.
目錄
中文摘要 i
英文摘要 ii
致謝 iii
目錄 iv
表目錄 vi
圖目錄 vii
第一章 緒論 1
1.1 研究動機 1
1.2 DCS1800系統規格 1
1.3 頻率合成器簡介 5
1.4 影像抑制電路簡介 7
1.5 論文架構 10
第二章 壓控振盪器 11
2.1 CMOS壓控振盪器 11
2.2相位雜訊分析 12
2.2.1相位雜訊預估模型 12
2.2.2元件參數萃取 16
2.2.3相位雜訊預估模型 19
2.3 正交輸出壓控振盪器 21
2.3.1頻譜儀量測正交訊號 21
2.3.2 耦合式壓控振盪器 24
2.3.3 多相位濾波器設計 32
2.4寬頻壓控振盪器 38
第三章 預除器、相位檢測器、充電泵設計 41
3.1 射頻預除器與除二電路 41
3.1.1 回顧 41
3.1.2 電路實現 44
3.2相位頻率檢測器(PFD)和充電泵(CP) 54
第四章 系統設計 59
4.1 迴路濾波器(LF) 59
4.2 頻率合成器實現 64
第五章 結論 68
參考文獻 69
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