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研究生:康智凱
研究生(外文):Chih-Kai Kang
論文名稱:鎢間隙壁複晶矽薄膜電晶體之製作與研究
論文名稱(外文):Study of Tungsten-Spacer Polycrystalline Silicon Thin Film Transistors
指導教授:張鼎張王東波王東波引用關係
指導教授(外文):Ting-Chang ChangDong-Po Wang
學位類別:碩士
校院名稱:國立中山大學
系所名稱:物理學系研究所
學門:自然科學學門
學類:物理學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:34
中文關鍵詞:間隙壁複晶矽薄膜電晶體
外文關鍵詞:WspacerTFTsGOLD
相關次數:
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在本論文中,我們成功的以選擇性沉積鎢的方式製作出閘極覆蓋輕摻雜汲極 ( gate-overlapped LDD )結構的複晶矽薄膜電晶體。 在適當的沉積條件下, 鎢薄膜可以不經過額外的蝕刻製程而選擇性的沉積在複晶矽閘極來形成間隙壁。 與傳統沒有輕摻雜汲極(LDD)結構的傳統薄膜電晶體比較起來, 我們的元件有效的降低漏電流且仍有相當的驅動電流。 我們元件的轉導值與傳統的差不多, 這是因為當元件操作在開的狀態時, 鎢間隙壁就像閘極的一部分可以感應出通道。
為了更進一步研究鎢間隙壁複晶矽薄膜電晶體的特性, 我們製作出不同通道厚度、 間隙壁厚度及輕摻雜汲極(LDD)濃度的元件。我們發現有著薄通道、厚間隙壁和低濃度輕摻雜汲極(LDD)的元件能有效的抑制floating body effect及kink effect。藉著比較電漿鈍化(passivation)後的元件特性,我們發現小尺寸的元件有較佳的passivasion效果。
最後, 我們研究鎢間隙壁複晶矽薄膜電晶體的熱載子可靠性。 由於可以降低汲極端的電場, 所以鎢間隙壁複晶矽薄膜電晶體比傳統複晶矽薄膜電晶體有較佳的熱載子可靠度。
In this thesis, we successfully fabricated GOLD ( gate-overlapped LDD ) polycrystalline silicon thin-film transistors ( poly-Si TFTs ) with selectively deposited W spacers. Under appropriate deposition conditions, tungsten ( W ) films can be selectively deposited on poly-Si gate electrodes to form spacers without any additional etching process. Compared with the conventional poly-TFTs without LDD structures, our devices effectively lower the leakage current and sustain a comparable on current. The transconductance of our devices is compatible to that of conventional devices, because W-spacer acts as a part of gate electrode to induce channel when the device is operated under ON state.
To further study the characteristics of W-spacer TFTs, devices with different channel thickness, spacer thickness and LDD dopant density are fabricated. It is found that thinner channel, thicker spacer and lightly doped LDD implant can effectively suppress the floating body effect and also the kink effect. By comparing device performances after plasma passivation, it is also found that small-dimensional devices have better passivation effect.
Finally, the hot-carrier reliability of W-spacer TFTs is also studied. Due to the reduced electric filed on the drain side, W-spacer TFTs have better reliability than the conventional counterparts.
CONTENTS
Chinese Abstracti
English Abstractii
Acknowledgementiii
Chapter 1
Introduction1
1.1 Background1
1.2 Small Dimensional poly-Si TFTs1
1.3 Motivation3
1.4 Thesis Outline4
Chapter 2
Experimental Procedures5
2.1 W-Spacer Poly-Si TFTs Fabrication Proces………………………………….5
2.2 Measurement6
2.3 Method of Device Parameter Extraction7
2.3.1 Determination of Threshold Voltage………………………………………7
2.3.2 Determination of Subthreshold Swing………………………………….…7
2.3.3 Determination of Field Effect Mobility ……………………………….......7
2.3.4 Determination of On/Off Current Ratio …………………..........................8
2.3.5 Determination of the trap state density …………………...........................9
Chapter 3
Results and Discussions11
3.1 The SEM image of W-SpacerTFTs ...…..………………………………11
3.2 Small-dimensional W-spacer TFTs and corresponding
conventionalTFTs ……12
3.3 Influences of channel thickness, spacer thickness and LDD dopant density on W-spacer TFTs characteristics……………………..……………………….13
3.4 Plasma passivation effects ...…..……………………..……………………...14
3.5 Hot-carrier reliability of W-spacer TFTs and conventional TFTs…………...15
Chapter 4
Conclusions17
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