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研究生:洪敏華
研究生(外文):Ming-Hwa Hong
論文名稱:對溫度變異具有高穩定性之低壓軌對軌運算放大器
論文名稱(外文):Low Voltage Rail-to-Rail Operational Amplifier with High Stability over Temperature Variation
指導教授:林吉聰
指導教授(外文):Jyi-Tsong Lin
學位類別:碩士
校院名稱:國立中山大學
系所名稱:電機工程學系研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:48
中文關鍵詞:運算放大器低壓溫度變異軌對軌
外文關鍵詞:rail-to-railoperational amplifierlow voltagetemperature variation
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這篇論文提出了一個可操作在1伏供應電壓下且對於溫度變異具有高穩定性之軌對軌運算放大器。 其中包含一個修改過的共模調整器(CM adapter)和一個修改的能隙參考位準(bandgap reference)偏壓電路。 首先,修改過的共模調整器是利用電壓位準位移的方法使得0到1伏的輸入共模電壓都位移到低於0.1伏的電壓位準。 將這個電路作為我們所提出的運算放大器的前置電路,則PMOS差動輸入級可以工作在軌對軌的輸入共模範圍下。 其次,修改過的能隙參考位準偏壓電路是結合兩個擁有相反溫度係數的電壓來產生一個對溫度去敏感的偏壓電流並送到輸入級。 此外在這個電路中,如果將一個BJT和原來存在電路中的二極體串接,則二極體的接面面積可以減少,使得在實際應用上利用到更少的BJT並聯。
在1伏的供應電壓下將以上兩個修改過的電路應用在我們所提出的運算放大器中,並且使用台積電1P4M 0.35μm的CMOS製程。 在25℃時,直流增益為78.9 分貝且單位增益頻寬為3.73 MHz。 相位邊際達到42.9度。 當溫度從0度變化到75度,對於我們所提出的運算放大器,其頻率響應會對溫度去敏感,而直流增益的變化量為2分貝。 運算放大器的佈局也會在這篇論文中呈現,其面積為0.2 mm2。


A rail-to-rail op-amp with high stability over temperature variation at 1-V supply voltage is presented in this thesis. It incorporates a modified CM adapter and a modified bandgap reference. First, the modified CM adapter utilizes a level-shifting technique to shift the input common mode voltage of 0-1 V to the level below 0.1 V. By introducing this circuit as the front-end block of the proposed op-amp, the PMOS differential input stage can be operated appropriately with the rail-to-rail input common mode range. Second, the modified bandgap reference that combines two voltages with opposite temperature coefficients generates a temperature-insensitive bias current to the input stage. Besides, by the technique of cascading a diode with an additional BJT, the junction area of the original diodes can be reduced and in the actual application, fewer parallel-connected BJTs are needed.
The two circuits are applied to the proposed op-amp operated at 1-V supply voltage in TSMC 1P4M 0.35μm CMOS technology. At 25℃, the dc gain is 78.9 dB and unity-gain bandwidth is 3.73 MHz. The phase margin is 42.9°. For the temperature from 0℃ to 75℃, the frequency response is temperature-insensitive and the dc gain variation is 2dB. The layout view of the proposed op-amp is also presented and the area is 0.2 mm2.


Contents
Chapter 1 Introduction……………………………………………………1
Chapter 2 Basic Architectures of Bandgap Reference and Op-amps Based on Single Differential Pair……………………………………………………………5
2.1 The Op-amps Based on a Single Differential Pair…………6
2.2 The Op-amp Proposed by J. Francisco Duque-Carrillo………7
2.2.1 Common Mode Adapter………………………………………7
2.2.2 Overall Structure of the Op-amp………………………9
2.3 Bandgap Reference…………………………………………………9
Chapter 3 Modified Common Mode Adapter and Bandgap Reference………………………………………………………………………18
3.1 Modified Common Mode Adapter…………………………………18
3.2 Modified Bandgap Reference……………………………………19
3.3 The Op-amp with the Modified CMA and BGR Circuits………21
3.4 Modified BGR Providing a Bias Current………………………22
Chapter 4 Simulation Results of the Proposed Op-amp……………33
4.1 The Simulation Results of the Proposed Op-amp……………33
4.2 Layout View and Post Layout Simulation……………………34
Chapter 5 Conclusion……………………………………………43
Reference……………………………………………………………44
Appendix……………………………………………………………46


Reference
[1] Wen-chung S. Wu, Ward J. Helms, Jay A. Kuhn, and Bruce E. Byrkett, “Digital-Compatible High-performance Operational Amplifier with Rail-to-Rail Input and Output Ranges”, IEEE Journal of Solid State Circuits, vol. 29, No.1, pp. 63-66, January 1994.
[2] A.L. Coban and P.E. Allen, “A 1.75V rail-to-rail CMOS op amp”, in Proc. IEEE Symp. Circuit and Systems, August 1994, vol. 5, pp. 497-500.
[3] A.L. Coban and P.E. Allen, “A Low-Voltage CMOS Op Amp with Rail-to-Rail Constant-gm Input Stage and High-Gain Output Stage”, in Proc. IEEE Symp. Circuit and Systems, 1995, vol. 2, pp. 1548-1551.
[4] Ron Hogervorst, S. Morteza Safai, John P. Tero, and Johan H. Huijsing, “A Programmable 3-V CMOS Rail-to-Rail Opamp with Gain Boosting for Driving Heavy Resistive Loads”, in Proc. IEEE Symp. Circuit and Systems, 1995, vol. 2, pp. 1544-1547.
[5] William Redman-White, “A High Bandwidth Constant gm and Slew-Rate Rail-to-Rail CMOS Input Circuit and its Application to Analog Cells for Low Voltage VLSI Systems”, IEEE Journal of Solid State Circuits, vol. 32, No. 5, pp. 701-712, May 1997.
[6] Shouli Yan and Edgar Sanchez-Sinencio, “A Programmable Rail-to-Rail Constant-GM Input Structure for LV Amplifier”, in Proc. IEEE Symp. Circuit and Systems, 2000, vol. 5, pp. 645-648.
[7] Minsheng Wang, Terry L. Mayhugh, Jr., Sherif H. K. Embabi, and Edgar Sanchez-Sinencio, “Constant-gm Rail-to-Rail CMOS Op-Amp Input Stage with Overlapped Transition Regions”, IEEE Journal of Solid State Circuits, vol. 34, No. 2, pp. 148-156, February 1999.
[8] Faramarz Bahmani, S. M. Fakhraie, and A. Khakifirooz, “A Rail-to-Rail, Constant-Gm, 1-Volt CMOS Opamp”, in Proc. IEEE Symp. Circuit and Systems, 2000, vol. 2, pp. 669-672.
[9] J. Francisco Duque-Carrillo, Jose L. Ausin, Guido Torelli, Jose M. Valverde, and Miguel A. Dominguez, “1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology”, IEEE Journal of Solid State Circuits, vol. 35, No. 1, pp. 33-44, January 2000.
[10] Tonny A. F. Duisters and Eise Carel Dijkmans, “A —90-dB THD Rail-to-Rail Input Opamp Using a New Local Charge Pump in CMOS”, IEEE Journal of Solid State Circuits, vol. 33, No. 7, pp. 947-955, July 1998.
[11] Soundarapandian Karthikeyan, Siamak Mortezapour, Anilkumar Tammineedi, and Edward K. F. Lee, “Low-Voltage Analog Circuit Design Based on Biased Inverting Opamp Configuration”, IEEE Transactions on Circuits and Systems-Ⅱ: Analog and Digital Signal Processing, vol. 47, No. 3, pp. 176-184, March 2000.
[12] J. Ramirez-Angulo, R. G. Carvajal, J. Tombs, and A. Torralba, “Low-Voltage CMOS Op-amp with Rail-to-Rail Input and Output Signal Swing for Continuous-Time Signal Processing Using Multiple-Input Floating-Gate Transistors”, IEEE Transactions on Circuits and Systems-Ⅱ: Analog and Digital Signal Processing, vol. 48, No. 1, pp. 111-116, January 2001.
[13] Behzad Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, pp. 381-392, 2001.
[14] Hironori Banba, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, and Koji Sakui, “A CMOS Bandgap Reference Circuit with Sub-1-V Operation”, IEEE Journal of Solid State Circuits, vol. 34, No. 5, pp. 670-674, May 1999.

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