|
Reference [1] Wen-chung S. Wu, Ward J. Helms, Jay A. Kuhn, and Bruce E. Byrkett, “Digital-Compatible High-performance Operational Amplifier with Rail-to-Rail Input and Output Ranges”, IEEE Journal of Solid State Circuits, vol. 29, No.1, pp. 63-66, January 1994. [2] A.L. Coban and P.E. Allen, “A 1.75V rail-to-rail CMOS op amp”, in Proc. IEEE Symp. Circuit and Systems, August 1994, vol. 5, pp. 497-500. [3] A.L. Coban and P.E. Allen, “A Low-Voltage CMOS Op Amp with Rail-to-Rail Constant-gm Input Stage and High-Gain Output Stage”, in Proc. IEEE Symp. Circuit and Systems, 1995, vol. 2, pp. 1548-1551. [4] Ron Hogervorst, S. Morteza Safai, John P. Tero, and Johan H. Huijsing, “A Programmable 3-V CMOS Rail-to-Rail Opamp with Gain Boosting for Driving Heavy Resistive Loads”, in Proc. IEEE Symp. Circuit and Systems, 1995, vol. 2, pp. 1544-1547. [5] William Redman-White, “A High Bandwidth Constant gm and Slew-Rate Rail-to-Rail CMOS Input Circuit and its Application to Analog Cells for Low Voltage VLSI Systems”, IEEE Journal of Solid State Circuits, vol. 32, No. 5, pp. 701-712, May 1997. [6] Shouli Yan and Edgar Sanchez-Sinencio, “A Programmable Rail-to-Rail Constant-GM Input Structure for LV Amplifier”, in Proc. IEEE Symp. Circuit and Systems, 2000, vol. 5, pp. 645-648. [7] Minsheng Wang, Terry L. Mayhugh, Jr., Sherif H. K. Embabi, and Edgar Sanchez-Sinencio, “Constant-gm Rail-to-Rail CMOS Op-Amp Input Stage with Overlapped Transition Regions”, IEEE Journal of Solid State Circuits, vol. 34, No. 2, pp. 148-156, February 1999. [8] Faramarz Bahmani, S. M. Fakhraie, and A. Khakifirooz, “A Rail-to-Rail, Constant-Gm, 1-Volt CMOS Opamp”, in Proc. IEEE Symp. Circuit and Systems, 2000, vol. 2, pp. 669-672. [9] J. Francisco Duque-Carrillo, Jose L. Ausin, Guido Torelli, Jose M. Valverde, and Miguel A. Dominguez, “1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology”, IEEE Journal of Solid State Circuits, vol. 35, No. 1, pp. 33-44, January 2000. [10] Tonny A. F. Duisters and Eise Carel Dijkmans, “A —90-dB THD Rail-to-Rail Input Opamp Using a New Local Charge Pump in CMOS”, IEEE Journal of Solid State Circuits, vol. 33, No. 7, pp. 947-955, July 1998. [11] Soundarapandian Karthikeyan, Siamak Mortezapour, Anilkumar Tammineedi, and Edward K. F. Lee, “Low-Voltage Analog Circuit Design Based on Biased Inverting Opamp Configuration”, IEEE Transactions on Circuits and Systems-Ⅱ: Analog and Digital Signal Processing, vol. 47, No. 3, pp. 176-184, March 2000. [12] J. Ramirez-Angulo, R. G. Carvajal, J. Tombs, and A. Torralba, “Low-Voltage CMOS Op-amp with Rail-to-Rail Input and Output Signal Swing for Continuous-Time Signal Processing Using Multiple-Input Floating-Gate Transistors”, IEEE Transactions on Circuits and Systems-Ⅱ: Analog and Digital Signal Processing, vol. 48, No. 1, pp. 111-116, January 2001. [13] Behzad Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, pp. 381-392, 2001. [14] Hironori Banba, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, and Koji Sakui, “A CMOS Bandgap Reference Circuit with Sub-1-V Operation”, IEEE Journal of Solid State Circuits, vol. 34, No. 5, pp. 670-674, May 1999.
|