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研究生:張孝甄
研究生(外文):Hsiao-Chen Chang
論文名稱:結合時域有限差分法及逐層阻抗演算法萃取內嵌式高頻互連結構等效電路之研究
論文名稱(外文):Equivalent Circuit Extraction of Embedded High-speed Interconnects by Combining FDTD method and Layer Peeling Technique
指導教授:吳宗霖吳宗霖引用關係
指導教授(外文):Tzong-Lin Wu
學位類別:碩士
校院名稱:國立中山大學
系所名稱:電機工程學系研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:78
中文關鍵詞:互連等效電路時域反射
外文關鍵詞:Embedded interconnectLayer peeling methodFDTD
相關次數:
  • 被引用被引用:3
  • 點閱點閱:228
  • 評分評分:
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:2

本論文介紹一種有效的SPICE等效電路萃取法,以有限時域差分法(FDTD)模擬內嵌式互連結構來得的時域反射電壓,來萃取內嵌式互連結構(Embedded interconnect)的等效電路。逐層阻抗演算法(Layer peeling method)可以求得待測物的時域步階響應,矩陣束法可以得到時域步階響應的極點-留數表示式。從頻寬的考量利用極點的抑制可以簡化極點-留數表示式。最後,待測物的集總元件等效電路可利用系統化集總元件萃取法中四個等效電路模組合成這種等效電路可用SPICE等軟體模擬,文中並以數種傳輸線結構為例,證明此法在時域及頻域均有不錯的正確性。


We proposes an efficient algorithm for extracting SPICE-compatible circuits of embedded interconnect structures from FDTD-simulated time-domain reflections. A layer-peeling technique (LPT) is used to obtain the time-domain step response of the interconnects under extract (IUE) itself. A pencil matrix method is then used to get the pole-residue representation of the time-domain step response of the IUE. A pole-reducing procedure is implemented based on a bandwidth criterion to simplify pole-residue representation. Finally, the lumped equivalent models of the IUE are synthesized by an equivalent lumped-model extraction technique, in which four types of equivalent model bases are used. The equivalent circuit can be easily implemented in SPICE-like simulator. Several transmission line structures are presented as examples to demonstrate the validity of the proposed algorithm both in time and frequency domains.


論文提要I
目錄III
圖表目錄V
第一章序論1
第二章時域電壓的擷取2
2-1 FDTD演算法2
2-1-1馬克斯威爾方程式和FDTD理論2
2-1-2穩定準則6
2-1-3吸收邊界6
2-1-4 FDTD模擬10
2-2 TDR理論基礎 11
2-2-1訊號整合(signal integrity)的重要性11
2-2-2時域反射儀量測架構14
第三章等效電路萃取理論17
3-1 逐層阻抗剝取法 17
3-2矩陣束法和普洛尼理論21
3-2-1簡介21
3-2-2矩陣束法21
3-2-3普洛尼理論24
3-2-4比較普洛尼理論和矩陣束法25
3-3如何系統化的擷取等效電路集總元件26
3-3-1 電抗理論26
3-3-2系統化集總元件萃取法31
3-4 極點的降低34
第四章模擬與量測36
4-1 矩陣束法與普洛尼理論的比較36
4-2 系統化集總元件等效電路萃取流程47
4-3傳輸線互連結構萃取49
第五章結論69
參考文獻


參考文獻
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