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研究生:林政偉
研究生(外文):Zheng-Wei Lin
論文名稱:不同封裝材質和基板大小對覆晶球形陣列封裝熱傳性質影響之數值模擬
論文名稱(外文):Numerical Investigation on the Thermal Performance of Flip-Chip BGA With Different Material Conductivities and Substrate Sizes
指導教授:林昭安
指導教授(外文):Chao-An Lin
學位類別:碩士
校院名稱:國立清華大學
系所名稱:動力機械工程學系
學門:工程學門
學類:機械工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:63
中文關鍵詞:覆晶球型陣列封裝表面熱傳係數基板大小材料熱傳係數強制對流層流
外文關鍵詞:flip- chip BGAheat transfer coefficientsubstrate sizematerial thermal conductivityforced convectionlaminar flow
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本研究的主要目的在於建構正確之覆晶球形陣列封裝之表面熱傳係數,進而當做三維熱傳程式之邊界條件,來大幅降低計算時間。首先,藉由熱流分析軟體FLOTHERM,模擬覆晶球型陣列封裝在不同材料性質和不同基板大小下,且測試條件是層流和強制對流(忽略熱幅射和重力效應)狀況下之熱傳現象,進一步採用FLOTHERM的結果,得到封裝接觸到流體之表面之熱傳係數,此新的熱傳係數關係式,能包含材料和基板的效應。
  此一組新的熱傳係數關係式,將被使用為三維熱傳導程式之邊界條件,取代一般的平板公式。且由於封裝幾何形狀的關係,有四個重要的表面熱傳係數需要考慮,分別是晶片上表面和基板上表面和印刷電路板上下表面之熱傳係數。接下來,我們藉著最佳化擬合去計算在固定基板大小下,不同材料性質下四個表面熱傳係數的值。此外由三維熱導傳程式的值顯示,使用平板公式的為邊界條件下的接點溫度誤差隨著風速的增加最大可到12%,但是隨著封裝元件的熱傳導係數增加,最大的接點溫度誤差小於3%,但是使用新的熱傳係數為邊界條件下的最大接點溫度誤差小於1%,因此當計算的精確度要求很嚴格的狀況下,建議使用新的熱傳係數關係式,以減少計算誤差。
  

The main objective of the present study is to construct a heat transfer correlation to be used as boundary condition in the three-dimensional conduction simulation to simulate the thermal field within the flip chip BGA package. First, the thermal field of the flip chip BGA package is simulated using CFD model under the laminar flow regime, where the radiant and gravitational effects are ignored, and the simulated results are used to extract the heat transfer coefficients along the surfaces in contact with the airflow. Then, based on the heat transfer coefficients, a new group of accurate heat transfer coefficients correlations that include the effects of different substrate sizes and package components thermal conductivities is proposed.
This will be used as the boundary conditions for the three dimensional conduction equation to replace the commonly adopted flat plate formula. Due to the package geometry configuration, there are four important local heat transfer coefficients needed to be considered. They are Hdie, Hsub, Hpcbup, Hpcbdown, which mean the heat transfer coefficients on the surface of the die, substrate, upper surface of PCB and lower surface of PCB, respectively. A best fitting interpolation procedure is applied to determine the Hsub, Hpcbup, and Hpcbdown under different thermal component conductivities, when the substrate size is fixed.
Three-dimensional conduction simulations for flip-chip BGA package using the flat plate formula indicates that when the free stream velocity increases the maximum predicted junction temperature error increases up to 12 %. However, when the components thermal conductivities increase, the maximum predicted error decreases down to 3 %. If the newly developed heat transfer coefficients correlations are used as boundary condition in the 3-D conduction simulations of the flip-chip BGA package, the maximum predicted junction temperature error is less than 1 %. Therefore, if the requirement of simulation accuracy is very restrict, it is not advisable to use the flat plate formula to predict the heat transfer coefficients h, instead the newly proposed formula should be adopted.

Contents
Abstract i
Acknowledgment ii
Nomenclature iii
List of Figures v
Contents vii
Chapter 1. Introduction 1
1-1 The Trend of the Electronic Industry ……………………….……………..………… 1
1-2 The Necessity for Thermal Control of the Electronic Components/Systems……….. 2
1-3 Packaging Hierarchy ………………………………………………………………… 3
1-4 Aims of Electronic Packaging. ..…………………………………..…..……………. 3
1-5 Introduction of Different Package Type ………………………….…………………. 4
1-5-1 DIP (Dual In-line Package)……………………………....……………………... 5
1-5-2 SOP and SOJ…………………………………………….…...…………………. 5
1-5-3 QFP and LCC ………………………………………….……………………….. 6
1-5-4 PGA and BGA ……………………………………….…………….…………… 7
1-5-5 Flip-Chip (CSP)…………………………………….…………………………… 8
1-6 The Simplified h-model ……………………………………………………………... 9
Chapter 2. Literature Survey 12
2-1 Literatures Survey Related to the Field of Thermal Performance of the Package…... 12
2-2 Simplified Heat Transfer Coefficient Model……………………….………………... 13
2-3 Summary ……………………………….………………….………………………… 13
Chapter 3. Governing Equations and Numerical Method 15
3-1 Governing Equations………………………………………………………….……... 15
3-1-1 Generalized Governing Equation ………………………………….…………… 15
3-1-2 Turbulence Model………………………………………………………………. 16
3-2 Numerical Method ..………………………………………………………….……… 19
3-2-1 Basic Concept…………………………………………………………….……... 19
3-2-2 FLOTHERM……………………………………………………….……..…….. 20
3-2-3 Staggered Grid System …………………………………………………………. 21
3-2-4 Discretization Equations………………………………………………………... 22
3-2-5 Pressure and Velocity Corrections………………………………….…………… 23
3-2-6 Solution Procedure of SIMPLE algorithm……………………………….……... 25
3-3 Test Environment and Boundary Conditions………………………………….……... 25
3-4 Package Structure and Modeling…………………………………………….………. 26
3-4-1 Package Structure and Dimension………….………………………….………... 26
3-4-2 Package Modeling ……………………………………………………………… 28
Chapter 4. Results and Discussions 29
4-1 Grid Independent Test …………………………………………………………….. 29
4-2 Effects of Different Component Conductivities and Substrate Cross Section Area… 30
4-3 The Results of the Coefficients of the Correlations………………………………….. 33
4-4 Discussion of Correlations 33
4-4-1 Validation of Correlations 33
4-4-2 Comparison of the Correlations and Flat Plate Formula 33
Chapter 5 Conclusion 35
Figure 37
Appendix A………………………………………………………………….. 55
Reference………………………………………………………………………………….. 62

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[9] Mike Eyman, Zane Johnson, and Bennett Joiner,1998, “Thermal Simulation and Validation of the Fast Static RAM 164-Lead FC-PBGA Package with Investigation of Package Thermal Performance in a Generic CPU Module,” 1998 Electronic Components and Technology Conference
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[11] Frank M. White, 1991, “Viscous Fluid Flow,” Second Edition, McGraw Hill, Singapore.
[12] Suhas V. Patankar, 1980, “Numerical Heat Transfer and Fluid Flow,” Hemisphere Publishing Corporation.
[13] Flomerics,1993, “How to Use FLOTHERM- Lecture Course,” Flomerics, England.
[14] S. Goldstein, 1965, “Modern Developments in Fluid Dynamics,” Dover Publications Inc. Vol.2.
[15] Paul G. Tucker, 1997, “ CFD Applied to Electronic Systems : A Review,” IEEE Trans. on Components, Packaging, and Manufacturing Technology─Part A, Vol. 20, No. 4, pp. 518-529.
[16] B. E. Launder and D. B. Spalding, 1974, “ The numerical computation of turbulent flows,” Comput. Meth. Appl. Mech. Eng., Vol. 3, pp. 269-289.
[17] Integrated Circuit Thermal Test Method Environmental Conditions─Natural Convection (Still Air), JEDEC Standard 51-2.
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[19] Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Devices), JEDEC Standard 51.
[20] Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages, JEDEC Standard 51-3.
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