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研究生:鄭秀渝
研究生(外文):Hsiu-Yu Cheng
論文名稱:新式具消除暗電流及動態靈敏度之影像感測器元件及操作方式
論文名稱(外文):A Novel CMOS Photon Sensing Device With Dark Current Cancellation and Dynamic Sensitivity
指導教授:金雅琴
指導教授(外文):Ya-Chin King
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:64
中文關鍵詞:影像感測器元件暗電流動態範圍靈敏度
外文關鍵詞:CMOS image sensordark currentdynamic rangesensitivity
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本篇論文提出一種可用標準0.35微米CMOS邏輯製程製作,且具有極低暗電流與高靈敏度的可整合型影像感測器單元。我們開發了一種混合光閘極與光二極體的影像感測元件,配合新提出的操作方式,達到了在單元內消除暗電流的影像感測器。由於傳統的影像感測元件如感光二極體的暗電流主要成分來自於表面的缺陷內產生的漏電機制。所以利用這個特性,我們在一個積分週期內對感光元件做兩次重置的動作,並讓元件操作在兩種不同的模式之下。而在這兩種不同的操作模式下,新式的光感測元件會對光有不同的靈敏度但卻有相同大小的暗電流。也因此我們可以有效的扣除暗電流造成的影響。
而為了增加照光區的光響應,我們採用了一種可以避免金屬矽化物生成的RPO光罩。而採用這層原本內建於標準製程中的光罩,不僅能夠增加元件對光的響應,還可以降低暗電流的大小。原因在於長金屬氧化物的過程會讓矽的表面更粗糙。最後由實驗結果證明,對CMOS主動式影像感測器影像品質影響嚴重的暗電流可以有效的被降低到一個令人滿意的數值。除此之外,藉由調整在光閘極上的操作電壓,我們可以調變最佳的靈敏度曲線以達到最大的照光範圍。結合上述兩種操作方法,此影像感測器單元的動態範圍可以增加20倍。故此篇提出的影像感測器,具有低暗電流、高靈敏度、及高動態範圍是CMOS影像感測單元的最佳選擇。

An ultra low dark signal and high sensitivity pixel has been developed for an embedded active-pixel CMOS image sensor, by using a standard 0.35-µm CMOS logic process. To achieve in-pixel dark current cancellation, we developed a combined photogate/photodiode photon-sensing device with a novel operation scheme. To eliminate the photosensitivity reduction resulting from the optically opaque salicide layer, a salicide blocking mask is adopted to obtain a sensitivity improvement of 110%. The experimental results demonstrate that the severe dark signal degradation of CMOS active pixel sensor (APS) is reduced more than an order of magnitude. Through varying the bias conditions on the photogate, dynamic sensitivity can be obtained by increasing the maximum allowable illumination level. Combining the above two operation schemes, the dynamic range of this new cell is extended by more than 20X.

ABSTRACT……………………………………………………………….....II
ACKNOWLEGEMENT…………………………………………………………….…IV
LIST OF CONTENTS…………………………………………………………………..V
LIST OF FIGURES…………………………………………………………………...VII
LIST OF TABLES……………………………………………………………………...IX
CHAPTER ONE INTRODUCTION………………………………………………..10
CHAPTER TWO REVIEW OF PRIOR APPROACHES………………………..12
2.1 Dark Current Components……………………………………………………...12
2.1.1 Diffusion Current…………………………………………………………..13
2.1.2 Surface Leakage Current…………………………………………………..14
2.1.3 Generation-Recombination Current………………………………………..14
2.1.4 Tunneling Current………………………………………………………….15
2.2 Prior Approaches……………………………………………………………….15
2.2.1 Process and Structure Approach…………………………………………...16
2.2.2 Double Diffused Drain (DDD)…………………………………………….17
2.2.3 Circuit Approach…………………………………………………………...17
2.3 Summary………………………………………………………………………..18
CHAPTER THREE CELL STRUCTURE AND OPERATION SCHEME…….25
3.1 New Photon Sensing Device Physics…………………………………………..25
3.1.1 Photodiode Mode…………………………………………………………..26
3.1.2 Combined Photodiode and Photogate Mode………………………………26
3.2 Dark Current Cancellation Technique………….………………………………27
3.2.1 Pixel Operation and Dual CDS…………………………………………….27
CHAPTER FOUR SAMPLE AND MEASUREMENT PREPARATION……….35
4.1 Experimental Design…………………………………………………………...35
4.1.1 Process Condition………………………………………………………….35
4.1.2 Test Key Design……………………………………………………………36
4.1.3 Measurement
Setup………………………………………………………..37
CHAPTER FIVE MEASUREMENT RESULTS AND DISCUSSIONS…………41
5.1 Sensor Performance…………………………………………………………….41
5.1.1 Dark Current……………………………………………………………….42
5.1.2 Sensitivity………………………………………………………………….42
5.1.3 Dynamic Range…………………………………………………………....43
5.1.4 Dark Current Nonuniformity………………………………………………44
5.2 Device Structure Optimization…………………………………………………45
5.3 Operation Optimization………………………………………………………...46
5.4 Dynamic Range Extension……………………………………………………..47
5.4.1 Addition Approach…………………………………………………………47
5.4.2 In Pixel Switch for Dynamic Sensitivity…………………………………47
5.4.3 Fixed PG Bias……………………………………………………………...48
5.5 Performance Comparison..……………………………………………………..49
CHAPTER SIX CONCLUSIONS…………………………………………………….63
REFERENCES………………………………………………………………………….64

[1.1] E. R. Fossum, “CMOS image sensors: Electronic camera-on-a-chip,” in IEEE IEDM Tech. Dig., 1995, pp. 17-25.
[1.2] B. Ackland and A. Dickinson, “Camera-on-a-chip”, in 1996 ISSCC Tech. Papers, 1996, pp.22-25.
[1.3] S. K. Mendis, S. E. Kemeny, R. C. Gee, B. Pain, Q. Kim, and E. R. Fossum, “CMOS active pixel image sensors for highly integrated imaging systems”, IEEE J. Solid-State Circuits, vol. 32, pp. 187-197, Feb. 1997.
[1.4] R. H. Nixon, S. E. Kemeny, B. Pain, C. O. Staller, and E. R. Fossum, “256 x 256 CMOS active pixel sensor camera-on-a-chip”, IEEE J. Solid-State Circuits, vol. 31, pp. 2046-2050, Dec. 1996.
[1.5] Albert J. P. Theuwissen, “CCD or CMOS image sensors for consumer digital still photography? ”, presented at 2001 Int. Symposium on VLSI Technology, Systems, and Applications, Hsinchu, Taiwan, Apr. 168-171, 2001.
[1.6] E. R. Fossum, “CMOS image sensors: Electronic camera-on-a-chip,” IEEE Trans. Electron Devices, vol. 44, pp.1689-1698, Oct. 1997.
[1.7] H. S. P. Wong, “CMOS image sensors---Recent advances and device scaling considerations,” in IEEE IEDM Tech. Dig., 1997, pp. 201-204.
[1.8] J. Hynecek, “A new device architecture suitable for high-resolution and high-performance image sensors,” IEEE Trans. Electron Devices, vol. 35, pp.646-652, Mar. 1988.
[1.9] P. Lee, R. Gee, M. Guidash, T. Lee, and E. R. Fossum, “An active pixel sensor fabricated using CMOS/ CCD process technology,” presented at 1995 IEEE workshop on CCD’s and Advanced Image Sensors, Dana Point, CA, Apr. 20-22, 1995.
[1.10] H. S. P. Wong, R. T. Chang, E. Crabbe, and P. D. Agnello, “CMOS Active Pixel Image Sensors Fabricated Using a 1.8-V, 0.25-µm CMOS Technology”, IEEE Trans. Electron Devices, vol. 45, pp. 889-894, April 1998.
[1.11] S. Mendis, S. E. Kemeny, R. Gee, B. Pain, and E. R. Fossum, “Progress in CMOS active pixel image sensors,” Charge-Coupled Devices and Solid State Optical Sensors IV, Proc. SPIE, vol. 2172, pp.19-29, 1994.
[1.12] J. Woo, D. J. Min, J. Kim, and W. Kim, “A 600-dpi capacitive finger-print sensor chip and image synthesis technique,” IEEE J. Solid-State Circuits, vol. 34, pp. 469-475.
[1.13] A. J. Blanksby, and M. J. Loinaz, “Performance analysis of a color CMOS photogate image sensor”, IEEE Trans. Electron Devices, vol. 47, pp.55-64, Jan. 2000.
[1.14] W. Zhang, and M. Chan, “Properties and design optimization of photo-diodes available in a current CMOS technology”, IEEE Hong Kong Electron Devices Meeting, pp 22-25, 1998.
[1.15] H. D. Lee and J. M. Hwang, “Accurate extraction of reverse leakage current components of shallow silicided p+-n junction for quarter and subquarter-micron MOSFET’s”, IEEE Trans. Electron Devices, vol.45, pp.1848-1850, Aug. 1998.
[1.16] S. N. Hong, G. A. Ruggles, J. J. Wortman, and M. C. Ozturk, “Material and electrical properties of ultra-shallow p+-n junctions formed by low-energy ion implantation and thermal annealing,” IEEE Trans. Electron Devices, vol. 38, pp. 476-486, 1991.
[2.1] H. Lee, J. M. Hwang, Y. J. Park, H. S. Min, “A leakage current mechanism caused by the interaction of residual oxidation stress and high-energy ion implantation impact in advanced CMOS technology,” IEEE Electron Device Letters, vol. 20, pp.251-253, May. 1999.
[2.2] S. H. Pyi, I. S. Yeo, D. H. Weon, Y. B. Kim, S. K. Lee, “Roles of sidewall oxidation in the devices with shallow trench isolation,” IEEE Electron Device Letters, vol. 20, pp. 384-386, Aug. 1999.
[2.3] R. M. Guidash, T. H. Lee, P. P. K. Lee, D. H. Sackett, C. I. Drowley, M. S. Swenson, L. Arbaugh, R. Hollstein, F. Shapiro, and S. Domer, “A 0.6um CMOS Pinned Photodiode Color Imager Technology,” in IEEE IEDM Tech. Dig., 1997 pp.927-929.
[2.4] T. H. Hou, T. F. Lei, and T. S. Chao, “Improvement of junction leakage of nickel silicided junction by a Ti-capping layer,” IEEE Electron Device Letters, vol. 20, pp. 572-573, Nov. 1999.
[2.5] A. Steegen, A. Lauwers, M. Potter, G. Badenes, R. Rooyackers, and K. Maex, “Silicide and Shallow Trench Isolation line width dependent stress induced junction leakage,” in VLSI Technology Tech. Dig., 2000 pp.180-181.
[2.6] W. T. Kang, J. S. Kim, K. Y. Lee, Y. C. Shin, T. H. Kim, Y. J. Park, and J. W. Park, “The leakage current improvement in an ultrashallow junction NMOS with Co silicided source and drain,” IEEE Electron Device Letters, vol. 21, pp. 9-11, Jan. 2000.
[2.7] H. D. Lee, and Y. J. Lee, “Arsenic and Phosphorus Double Ion Implanted Source/Drain Junction for 0.25- and Sub-0.25-um MOSFET Technology,” IEEE Electron Device Letters, vol. 20, pp. 42-44, Jan. 1999.
[2.8] J. T. Bosiers, A.C. Kleimann, H. C. Kuijk, L. Lecam, H. L. Peek, J. P. Maas, A. J. P. Theuwissen, “Frame transfer CCDs for digital still cameras: concept, design, and evaluation,” IEEE Trans. Electron Devices, vol. 49. pp.377-386, March. 2002.
[2.9] M. W. Ng, Y. H. Chee, and Y. P. Xu, “On-Chip Compensation of Dark Current in Infrared Focal Plane Arrays,” in IEEE ISCAS Tech. Dig., vol. 2. pp.509-512. 2001.

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