Reference:
[1] X.W. Lin, “Future interconnect technologies and copper metallization”, Solid State Technology, Oct. 1998, p.63
[2] S. Peter, “Tantalum, Copper and Damascene: The Future of Interconnects”, Semiconductor International, Jun. 1998, p.91
[3] N. Hosoi, R. Kimizuka, M. Nagai, S. Okuyama, T. Kobayashi, N. Ito, K. Arita, and
H. Miyamoto,“Two-step Copper Electroplating Technique Using Seed Enhancement Step with Alkali-Metal-Free copper Pyrophosphate Bath”, Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International ,0 2001
Page(s): 277 -279
[4] K.Chul. Park, S.M. Choi, S.J. Lee, K.H. Chang, H.D. Lee, H.K. Kang,and S.I. Lee, “Process integration of CVD Cu as a seed layer for Cu electroplating and a plug-fill application”,
Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International , 2000 Page(s): 43 -45
[5] S. Gandikota, C. McGuirk, D. Parikh, J. Chen, A. Malik and G. Dixit,“Characterization of Electroless Copper as a Seed layer for Sub-0.1μm Interconnects”, Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International , 2001
Page(s): 30 -32
[6] 潘仁泉 ” Electroless Copper Deposition on Ta、TaN、TiN Based for ULSI ”, 國立清華大學電子工程研究所碩士論文, 1999[7] U. Cohen, G. Tzanavaras,“ Jet ECD plating and seed layers for sub-0.10μm interconnects”, Solid State Technology, May 2001
[8] M. K. Lee, J.J. Wang,and H. D. Wang, “Deposition of Copper Films on Silicon from Cupric Sulfate and Hydrofluoric Acid”, Journal of Electrochemical Society, May. 1997
[9] 冉景涵, “Integration of Cu Seed Layer and Electroplating Deposition for ULSI”, 國立清華大學電子工程研究所碩士論文, 2000 , MRS Spring Meeting (2001) San Francisco, USA.
[10] 王宣凱 “ Novel Seed Layer for Cu Metallization”, 國立清華大學電子工程研究所碩士論文, 2001[11] Allen C. Hamilton Jr., “Acid Sulfate and Pyrophosphate Copper Plating”, Plating and Surface Finishing, 1998, p.24
[12] T. Thomas, R. Thomas, “Electroplating bath control for copper interconnects”, Solid State Technology, Nov. 1998, p.47
[13] W.C.Gau, T.C.Chang, J.C. Hu, “Copper electroplating for future ultralarge scale integration interconnection”, Journal of Vacuum Society Technology A, vol. 18, No. 2, Mar/Apr. 2000
[14] L.A. Nagahara, “Effectfs of HF solution in the electroless deposition on silicon surfaces”, American Vacuum Society, Vol. 11, No. 4, Jul/Aug 1993, p. 763
[15] Sebastiao G. dos Santos Filho, “A mechanism for electroless Cu plating onto Si”, Microelectronic Engineering, Vol. 33, 1997, p.149
[16] M.K. Lee, H. D. Wang, “A Cu seed layer for Cu deposition on silicon”, Solid-State Electronics, Vol. 41, No. 5, 1997, p. 695
[17] DIETER K. SCHRODER, “Semiconductor Material and Device Characterization”
[18] 汪建民等, ”材料分析”
[19] 張俊彥等, “積體電路製程及設備技術手冊”
[20] H.C. Chen, M.S. Yang, “The Investigation of electroplating Deposited Copper Films for Advanced VLSI Interconnection”, IITC 99, IEEE, 1999, p. 65