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研究生:張祐禎
研究生(外文):Yu-chen Chang
論文名稱:金屬(鋁)/鐵電薄膜(鋯鈦酸鉛)/絕緣層(氧化鉭)/半導體場效電晶體之製作及電性分析
論文名稱(外文):The fabriaction and electrical properties of metal(Al)/ferroelectric(Pb(Zr0.6,Ti0.4)O3)/insulator(Ta2O5)/Si field-effect transistors
指導教授:李雅明李雅明引用關係
指導教授(外文):Joseph Ya-min Lee
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
中文關鍵詞:鐵電薄膜MFIS結構
外文關鍵詞:ferroelectricMFIS
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在本實驗中我們成功的製作金屬/鐵電薄膜(PZT)/絕緣體(Ta2O5)/半導體(p-type)電晶體,並對其電性作分析。在基本的電性量測方面,我們得到臨界電壓為0.96 V,次臨界斜率是437 mV/decade以及電子遷移率為82 cm2/V-sec,已顯現出電晶體的基本特性。但是次臨界斜率太大,表示電晶體的開關能力不理想,以及電子遷移率過低的問題則需要更進一步的探討。另外我們也得到在閘極電場強度800 kV/cm時,閘極的電流密度為6x10-7 A/cm2。
在電晶體的記憶體效應方面,由IDS-VGS特性曲線的量測結果,我們可發現IDS-VGS曲線走向在掃瞄振幅電壓小於11.5 V時為逆時針走向,而在掃瞄振幅電壓大於11.5 V時為順時針走向,這表示在當外加電壓小於11.5 V時,IDS-VGS走向是鐵電極化在主導;當外加電壓大於11.5 V時,電荷注入的影響大於鐵電極化,因此IDS-VGS走向是電荷注入在主導。同時,在鐵電極化的主導下,記憶窗於掃瞄電壓振幅8 V時最大,為2.7 V。另外,我們也經由IDS-VDS的量測得到分別以PZT和Ta2O5為鐵電層和絕緣層的MFIS結構電晶體的寫入速度,寫入邏輯“1”和邏輯“0”所需的時間分別為1 s和10 ns。

Metal-ferroelectric-insulator-semiconductor field effect transistors (MFISFETs) using an Al/Pb(Zr0.6,Ti0.4)O3 (PZT)/Ta2O5/Si structure were successfully fabricated. The threshold voltage is 0.96 V and the electron mobility is 82 cm2/V-s. The gate current density is 6x10-7 A/cm2 at 800 kV/cm. The IDS-VGS characteristics depend on both the polarization of the PZT layer and the injected charges into the insulator layer. When the polarization effect is dominant, the memory window is as large as 2.7 V at an applied gate voltage of 8 V. The drain current can be controlled by a poling voltage indicating memory effect.

目 錄
第一章 緒論
1.1 動態隨機存取記憶體的發展趨勢………………………1 1.2 鐵電材料的電性…………………………………………1
1.3 鐵電材料鋯鈦酸鉛在記憶體上的應用…………………2 1.4 鐵電材料於FRAM的發展現況…………………………3
1.5 MFIS結構的應用…………………………………………5
第二章 鋯鈦酸鉛(PZT)的理論
2.1 鐵電材料的結構………………………………………6
2.2 鐵電材料的特徵………………………………………7
2.3 鐵電材料的開關理論…………………………………8
2.4 鐵電材料的可靠度……………………………………9
第三章 金屬/鐵電薄膜PZT/絕緣體/半導體 電晶體的製備
3.1 設備與製程……………………………………………11
3.2製作問題分析………………………………………15
3.3 注意事項………………………………………………16
第四章 M(Al)/F(PZT)/I(Ta2O5)/Si 場效電晶體的特性量測
4.1 電晶體的基本電性分析………………………………18
4.1.1 IDS-VDS Curve的特性…………………………18
4.1.2 臨界電壓(Threshold Voltage VT)……………18
4.1.3 次臨界斜率(Sub-threshold Slope)…………19
4.1.4 遷移率的探討(Mobility)……………………23
4.1.5 漏電流 (Leakage Current) ……………………24
4.1.6 基板效應 (Body Effect) ………………………24
4.2 電晶體的記憶體效應…………………………………25
4.2.1 IDS-VGS 曲線飄移與走向的探討…………………25
4.2.2 反應時間(Switching Time)…………………29
第五章 結論
附錄.1 Wafer Conditions
附錄.2 MFIS paper 比較表
附錄.3 Memory Window 比較表
附錄.4 PZT 特性表
附錄.5 PECVD 操作說明
附錄.6 Sputtering System 操作說明

Reference
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