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研究生:曾祐彬
研究生(外文):Yu-Bin Tseng
論文名稱:金屬(鋁)/鈦酸鍶鋇/半導體場效電晶體之製作與電性分析
論文名稱(外文):Fabrication and Characterization of M(Al)/(Ba0.5Sr0.5)TiO3/Si (p-type) Field-effect Transistors
指導教授:李雅明李雅明引用關係
指導教授(外文):Joseph Ya-Min Lee
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:90
中文關鍵詞:鈦酸鍶鋇
外文關鍵詞:BST
相關次數:
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在本實驗中,使用由射頻磁控濺鍍法來沉積鈦酸鍶鋇薄膜當作閘極氧化層n型通道場效電晶體已成功製作出來。在基本電性上的表現如:由Ids-Vds、Ids-Vgs以及C-V等圖,證明電晶體能夠正常的操作,且發現臨界電壓約是0.3V∼1V、次臨界斜率是106.9 mV/dec.以及電子遷移率約為295.4 cm2/V sec,已具有MOSFET的基本效能。
由於BST的△G (G代表Gibbs free energy)為負的,所以BST與Silicon的反應屬於放熱反應。這代表不需外加任何熱能,BST與Silicon就會自然的反應;且在考慮製程條件下,為了要補償氧缺,所以我們在濺鍍過程中通以氧氣。由於上述的原因,造成在BST與Silicon間會成長出一層低介電常數的二氧化矽。藉由雙電容模型(two-capacitor model)我們可以估算出自生的(native)SiO2的厚度約為0.9nm。
在漏電流機制的探討方面:(1)Al/BST/Silicon MIS結構在室溫時幾乎可以確定為由蕭基發射(Schottky emission)所主導,因此可以粹取出Al/BST的能障高度(barrier height)為0.53 eV;(2)利用電晶體結構並根據thermionic emission電流公式可以粹取出BST/Silicon的能障高度(barrier height)為0.56 eV。根據所粹取出的Al/BST與BST/Silicon的能障高度,我們可以建構出Al/BST/Silicon的能帶圖。
利用閘極二極體量測方式對於鈦酸鍶鋇電晶體做研究,發現在鈦酸鍶鋇跟矽介面所量測到的介面缺陷電荷密度、表面復合速率以及通道少數載子等參數,跟傳統的二氧化矽電晶體比較的話,發覺鈦酸鍶鋇跟矽基板的介面特性比二氧化矽的差,所以對於鈦酸鍶鋇電晶體未來仍有許多改進的空間。

N-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) using barium strontium titanate (Ba0.5,Sr0.5)TiO3 (BST) gate dielectric were successfully fabricated. The BST films are deposited by RF magnetron sputtering. The IDS-VDS and IDS-VGS characteristics are measured. The threshold voltage, the electron mobility, and the subthreshold slope are about 0.34 V, 295.4 cm2/V-s, and 106.9 mV/dec., respectively.
A two-capacitor model was used to extract the thickness of the native SiO2 layer between the BST and the Si substrate and the thickness is about 0.9 nm.
The leakage current conduction mechanism of BST thin films at room temperature is studied. For MIS structure, Schottky emission is dominant when the device is negatively biased. The barrier height of Al/BST extracted is 0.53 eV. Thermionic emission is dominant when the device is positively biased. The barrier height of BST/Silicon extracted is 0.56 eV. An Al/BST/Si energy band diagram based on these barrier heights is proposed.
The interface trap density, surface recombination velocity and the minority carrier lifetime in the field-induced region measured from gated diodes are 5.13×1014 cm-2eV-1, 4.17×104 cm/s and 1.9×10-10 s, respectively. Comparison with conventional MOSFETs with SiO2 gate oxide was made. It shows that the surface properties of BST transistors are worse than SiO2 transistors. For BST transistors, there are still many places for improvement in the future.

第一章 緒論
1.1深次微米積體電路技術概況
1.2鐵電材料鈦酸鍶鋇薄膜的基本特性介紹
1.3鈦酸鍶鋇薄膜的應用
1.3.1 BST在DRAM電容器方面的應

1.3.2 BST在gate dielectric方面的應用
1.4論文重點
第二章 電晶體製作流程
2.1製作流程
2.2電晶體製作流程
2.1.1 清洗wafer與成長field oxide之製作
2.1.2 Open source/drain
2.1.3 BST薄膜的製作
2.1.4 Contact hole etching
2.1.5 Al蒸鍍與metal etching
2.1.6 金屬蝕刻後熱退火處理(post-metallization RTA)
第三章 BST電晶體電性量測及分析
3.1IDS-VDS Curve的特性
3.2臨界電壓(VT)
3.3探討ID-VG Curve的特性
3.4次臨界斜率(sub-threshold swing)
3.5遷移率(mobility)的探討
3.6漏電流機制
3.7基板效應
第四章 自生氧化層(native oxide layer)
4.1自生氧化層存在的原因
4.2防止自生氧化層成長的方法
4.3自生氧化層厚度的粹取
4.3.1自生氧化層厚度粹取的理論(two-capacitor model)
4.3.2自生氧化層厚度的粹取
第五章 漏電流機制的探討
5.1漏電流傳導機制簡介
5.1.1蕭基發射或熱發射(Schottky emission or thermionic
emission)
5.1.2普爾-法蘭克發射(Poole-Frenkel emission)
5.2室溫下MIS結構的BST薄膜之漏電流傳導機制分析
5.2.1室溫下Al/BST能障高度之粹取
5.2.2室溫下BST/Silicon能障高度之粹取
5.3 Al/BST/Silicon能帶圖的構建
第六章 閘控二極體量測
6.1閘控二極體量測方法與介紹
6.2閘控二極體量測理論跟線路接法
6.2.1量測理論
6.2.2量測接法
6.3閘控二極體量測參數的探討
6.3.1表面復合速率和介面捕捉能態密度
6.3.2BST跟Si介面的少數載子生命週期(minority carrier life
time)
6.4閘控二極體量測結論
第七章 結論
Reference
Experimental diagrams and tables
Appendix:
A. Mask layout
B. Operation of the RF magnetron sputtering system
C. Sputtering condition

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[68] D.M. Tahan, L.C. Klein and A. Safari, “Processing And Dielectric Property Evaluation of Barium Strontium Titanate Thin Films Prepared By A Sol-Gel Technique”, Ferroelectrics, 1996 ISAF’96, Proceedings of the Tenth IEEE International Symposium on Application of Ferroelectrics, v1 p483, 1996
[69] D. Tahan, A. Safari, and L.C. Klein, “Sol-Gel Preparation of Barium Stronium Titanate Thin Films”, Applications of Ferroelectrics, 1994, ISAF’94, Proceesings of the Ninth IEEE International Symposium on, 1994, p427
[70] M.Yamamuka, T. Kawahara, A. Yuuki, and K. Ono, “Reaction Mechanism and Electrical Properties of (Ba,Sr)TiO3 Films Prepared by Liquid Source Chemical Vapor Deposition”, Jpn. J. Appl. Phys., v35 n4b p2530, 1996
[71] Y. Gao and T. Tran, “Isotopic study of metalorganic chemical vapor deposition of (Ba,Sr)TiO3 films on Pt”, APL, v75 n3 p415, 1999
[72] Y. Gao, S. He, P. Alluri, M. Engelhard, A. S. Lea, J. Finder, B. Melnick and R.L. Hance, “Effects of precursors and substrate materials on microstructure, dielectric properties, step coverage of (Ba,Sr)TiO3 films grown by metalorganic chemical vapor deposition”, JAP, v87 n1 p124, 2000
[73] T. Kawahara, S. Matsuno, M. Yamamuka, M. Tarutani, T. Sato, T. Horikawa, F. Uchikawa and K. Ono, “Conformal Step Coverage of (Ba,Sr)TiO3 Films Prepared by Liquid Source CVD using Ti(t-BuO)2(DPM)2”, Jpn. J. Appl. Phys., v38 n4b p2205, 1999
Chap2:
[1] Kawano, K. Morii, and Y. Nakayama, “Effect of Crystallization on Structure and Dielectric Properties of Thin Amorphous Films of (1-x)BaTiO3-xSrTiO3 (x=0-0.5,1.0)”, J. Appl. Phys., v73(10) p5141, 1992.
[2] Lee, Y. C. Choi, and B. S. Lee, “Effects of O2/Ar Ratio and Annealing on the Properties of ( Ba,Sr )TiO3 Films Prepared by RF Magnetron Sputtering”, Jpn. J. Appl. Phys., v36 n6a p3644, 1997.
[3] S.O.Park, C.S.Hwang, H.J.Cho, C.S.Kang, H.K.Kang, S.I.Lee, and M.Y.Lee, “Fabrication and Characterization of Pt/(Ba,Sr)TiO3/Pt Capacitors for Ultralarge-Scale Integrated Dynamic Random Access Memory Applications”, J. Jpn. Appl. Phys., v35 n2b p1548, 1996.
[4] C. S. Hwang, S. O. Park, H. J. Cho, C. S. Kang, H.K.Kang, S. I. Lee, and M. Y. Lee, “Deposition of Extremely Thin ( Ba,Sr )TiO3 Thin Films for Ultra-Large-Scale Integrated Dynamic Access Memory Application”, Appl. Phys. Ltr., v67(19) p2819, 1995.
[5] N. Ichinose, and T. Ogiwara, “Preparation and Rapid Thermal Annealing Effect of ( Ba,Sr )TiO3 Thin Films”, Jpn. J. Appl. Phys., v34 n9b p5189, 1995.
[6] J. H. Joo, Y. C. Jeon, J. M. Seon, K. Y. Oh, J. S. Roh, and J. J. Kim, “Effect of Post Annealing on the Conduction Properties of Pt/( Ba,Sr )TiO3/Pt Capacitors for Dynamic Random Access Memory Applications”, Jpn. J. Appl. Phys., v36 n7a p4382, 1997.
Chap3:
[1] NOTE “MOSFET Carrier Mobility Model Based on Gate Oxide
Thickness, Threshold Voltage and Gate Voltages” Solid-State Electronics Vol. 39, No. 10, pp. 1515-1518, 1996.
[2] G.W.Dietz, M.Schumacher, and R.Waser, “Leakage Current in Ba0.7Sr0.3TiO3 Thin Films for Ultrahigh-Density Dynamic Random Access Memories”, J. Appl. Phys., v82(5) p2359, 1997.
[3] C.M.Wu, “The Study of (Ba,Sr)TiO3 Thin Films Deposited on LaNiO3 Electrode by RF Magnetron Sputtering for DRAMs Applications”, Phd. Thesis, MSE of NTHU, 1997.
[4] Y.P.Wang, and T.Y.Tseng, “Electronic defect and trap-related current of Ba0.4Sr0.6TiO3 thin films”, J. Appl. Phys., v81(10) p6762, 1997.
[5] C.S. Hwang , B.T. Lee, C.S. Kang, J.W. Kim, K. H. Lee, H.J. Cho, H.Horii, W.D. Kim, S.I. Lee, Y.B. Roh, and M.Y. Lee, “A comparative study on the electrical conduction mechanisms of (Ba0.5Sr0.5)TiO3 thin films on Pt and IrO2 electrodes”, JAP, v83 n7 p3703, 1998.
[6] Kawano, K.Morii, and Y.Nakayama, “Effect of Crystallization on Structure and Dielectric Properties of Thin Amorphous Films of (1-x)BaTiO3-xSrTiO3 (x=0-0.5,1.0)”, J. Appl. Phys., v73(10) p5141, 1992.
[7] B.A. Baumert, L.H. Chang, A.T. Matsuda, T.L. Tsai, C.J. Tracy, R.B. Gregory, P.L. Fejes, N.G. Cave, and W. Chen, “Characterization of sputtered barium strontium titanate”, JAP, v82 n5 p2558, 1997.
Chap 4:
[1] Darrell G. Schlom and Jeffrey H. Haeni, “Thermodynamic Approach to Selecting Alternative Gate Dielectric”, MRS Bulletin, p198, March 2002.
[2] Yongjoo Jeon, Beyoung Hun Lee, Keith Zawadzki, Wen-Jie Qi, Aaron Lucas, Renee Nieh and Jack C. Lee, “Effect of Barrier Layer on the Electrical and Reliability Characteristics of High-k Gate Dielectric films”, IEDM, p797, 1998
[3] Noboru Ichinose and Takashi Ogiwara, “Preparation and Rapid Thermal Annealing Effect of (Ba,Sr)TiO3 Thin Films”, Jpn. J. Appl. Phys., v34 n9b p5198, 1995
Chap 5:
[1] C. W. Law, K.Y.Tong, K.L.Wong, J.H.Li and Kun Li “Electrical Characteristics of MIS Capacitors with BST Thin Films Deposited on n-Si(100) by the Sol-Gel Method”, IEEE, p54, 1998
[2] Y. Shimada, Atsuo Inoue, Toru Nasu, Koji Arita, Yoshihisa Nagano, Akihiro Matsuda, Yasuhiro Uemoto, Eiji Fujii, Masamichi Azuma, Yoshiro Oishi, Shin- ichiro Hayashi and Tatsuo Otsuki
”Temperature-Dependent Current -Voltage Characteristics of Fully Processed Ba0.7Sr0.3TiO3 Thin Film Capacitors Integrated in a Silicon Device” Jpn. J. Appl. Phys. Vol.35, p140 (1996)
[3] Yung-Bin Lin and Joseph Ya-min Lee ”The Temperature Dependence of the Conduction Current in Ba0.5Sr0.5TiO3 Thin-Film Capacitors for Memory Device Applications” J. Appl. Phys, Vol.87(4),p.1841 (2000)
[4] J. G. Simmons, “Conduction in thin dielectric films,” J. Phys. D: Appl. Phys., vol. 4, p. 613, 1971.
[5] J. F. Scott, “Ferroelectric Memories.” Springer-Verlag, Berlin, 2000.
[6] C. S. Hwang, B. T. Lee, C. S. Kang, J. W. Kim, K. H. Lee, H. J. Hou, H. Horii, W. D. Kim, S. I. Lee, Y. B. Roh, and M. Y. Lee, J. Appl. Phys. 89, 3703 (1998).
[7] S. M. Sze, Physics of Semiconductor Device, 2nd ed. (Wiley, New York, 1981)
Chap6:
[1] Sorin Cristoloveanu, Hisham Haddara, and Nathalie Revil, “Defect Localization Induced by Hot Carrier Injection in Short Channel MOSFETs: Concept, Modeling, and Characterization” Microelectro. Reliab., Vol. 33, No. 9, pp.1365-1385, 1993.
[2] A. S. Grove And D. J. Fitzgerald “Surface Effects on p-n Junctions: Characteristics of Surface Space-Charge Regions Under non-Equilibrium Conditions ,” Solid-Electronics Pergamon press Vol. 9, pp.783-806. 1966.
[3] P. U. Calzolari And S. Graffi, “A Theoretical Investigation on The Gernation Current In Silicon p-n Junctions Under Reverse Bias,” Solid-State Electronics, Vol.15, pp.1003-1011, 1972.
[4] P. C. T. Roberts And J. D. E. Beynon, ”An Experimental Determination Of The Carrier Lifetime Near The Si-SiO2 Interface,” Solid-State Electronics, Vol.16, pp.221-227, 1973.
[5] Jing-Chi Yu, Benjamin Chihming Lai, and Joseph Ya-min Lee, “Fabrication and Characterization of Metal-Oxide-Semiconductor Field-Effect Transistors and Gated Diodes Using Ta2O5 Gate Oxide” IEEE Electron Device Letters, Vol. 21, no. 11, November 2000.
[6] Yu-Rung Liu and Joseph Ya-min Lee, “The electrical properties of barium strontium titanate (Ba,Sr)TiO3 thin film capacitor and Metal-(Ba,Sr)TiO3-Semiconductor Field Effect Transistors.

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