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研究生:陳宗良
研究生(外文):Tzong-Liang Chen
論文名稱:利用高電壓製程技術製作可調式維持電壓靜電放電防護元件之特性分析
論文名稱(外文):The Fabrication and Characterization of Tunable Holding voltage Electrostatic Discharge (ESD) Protection Device for High Voltage Integrated Circuit Technology
指導教授:李雅明李雅明引用關係
指導教授(外文):Joseph Ya-Min Lee
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:72
中文關鍵詞:可調式維持電壓靜電放電
外文關鍵詞:Tunable holding voltageElectrostatic discharge
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到目前為止,在靜電放電(ESD)防護元件中,矽控整流器(SCR)是最有效率的元件。其優點為: (1).在單位佈局面積中, 矽控整流器具有最大之靜電放電防護失效臨界電壓(ESD Failure Threshold),大約是互補式金氧半場效電晶體(CMOSFET)的10倍[1]。 (2).當元件導通時, 矽控整流器擁有最低的等效電阻,1 ~ 5歐姆。對於相同的ESD電流,較不易產生熱功率,擁有較佳之熱處理能力。(3).與CMOS製程完全相容,無須添加特殊製程。但是其缺點主要有兩點: (1).矽控整流器元件的維持電壓( )較低,約在1 ~ 5伏特。當電路之操作電壓(Vdd)大於維持電壓( )時,電路上容易有閉鎖(Latchup)的問題。 (2).矽控整流器的觸發電壓( )過高,約在30 ~ 50伏特之間。在靜電放電防護元件尚未被啟動時,ESD電壓容易對內部電路或元件造成損害。
本論文之研究在於開發出可調式維持電壓(Tunable Holding Voltage)靜電放電防護元件,擺脫藉由電路設計避開低維持電壓且須佔用較大佈局空間的困擾,也因而獲得較低之寄生電容。我們將傳統之矽控整流器稍作變形,元件結構不變,只是將原本以金屬連線相接在一起構成陽極之 和 予以斷開,形成陽極接點( )和浮接- (floating- )。使得此結構變成一個P-I-N二極體串接一個PNPN路徑。其在高電流狀況下之導通路徑變成P-I-N Diode 串接一個寄生的SCR 。藉著改變陽極端 至floating- 之距離。 我們可以調整其維持電壓(Holding Voltage, )由10.4伏特 ~ 15.6伏特,並且其人體放電模式(Human bode mode,HBM)下之ESD失效臨界電壓可高達7千伏特。對此元件,我們並提出其在高電流狀態下之電壓-電流運作原理,且以一等效電路模型解釋之。在靜電放電防護課題上,提供一種新穎的靜電放電防護元件。

A novel SCR-like (Silicon-Controlled Rectifier) device, called tunable holding voltage SCR device, for latchup-free and on-chip protection against electrostatic discharge (ESD) stress at output pad of LCD driver is presented. This device’s structure consists of a parasitic SCR and a P-I-N diode. The holding voltage ( ) of this device is tunable and determined by the layout dimension between anode and floating- . The holding voltage ( ) ranges from 10.4 V to 15.6 V as the spacing increases from 0 mm to 4 mm. The capability of a protection circuit using this novel device is demonstrated the human-body mode (HBM) ESD failure threshold of an output buffer is larger than 7000 V.

目錄
頁次
第一章 緒論 6
1.1 靜電放電防護之發展現況 6
1.2 靜電放電防護元件之特性與優缺點 7
1.2.1 電阻器(Resistor) 7
1.2.2 P-N二極體 (P-N Diode) 8
1.2.3 雙載子電晶體(Bipolar Junction Transistor) 10
1.2.4 金氧半場效電晶體(MOSFET) 12
1.2.5 矽控整流器(Silicon Control Rectifier) 13
1.3 本論文之研究方向 16
第二章 靜電放電破壞(ESD)之模型與失效判定測試方法 18
2.1 靜電放電破壞(ESD)之模型 18
2.1.1人體放電模式 (Human Body Model, HBM) 18
2.1.2機器放電模式(Machine Model,MM) 18
2.1.3 元件充電模式(Charged Device Model, CDM) 19
2.1.4電場感應模式 (Field Induced Model, FIM) 19
2.2 靜電放電破壞(ESD)之測試方法與失效判定 19
2.2.1靜電放電破壞(ESD)之測試方法 19
2.2.2靜電放電破壞(ESD)之失效判定準則 22
第三章 可調式維持電壓靜電放電防護元件之製作流程
與佈局設計 23
3.1 製作流程 23
3.2 佈局設計 25
第四章 可調式維持電壓靜電放電防護元件之電性量測 26
4.1量測儀器簡介 26
4.1.1 量測儀器- 傳輸線觸波曲線偵測器 26
4.1.2 量測前校準與量測方法 28
4.2 電性量測結果與分析 28
4.2.1 佈局參數對元件電流-電壓曲線的影響 28
4.2.2 量測結果分析 30
第五章 可調式維持電壓靜電放電防護元件之電壓-電流
特性探討 33
5.1電壓-電流特性探討 33
5.2 等效電路模型之建立 36
第六章 結論 38

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