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研究生:李明哲
研究生(外文):Ming-Che Lee
論文名稱:真實亂數產生電路設計
論文名稱(外文):True Random Number Generator Circuit Designs
指導教授:張慶元張慶元引用關係
指導教授(外文):Tsin-Yuan Chang
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:108
中文關鍵詞:亂數產生器
外文關鍵詞:random number generator
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隨著政府、企業以及許多個人用戶都已逐漸改採電子方式儲存資料,資訊安全已經成為目前倍受矚目的一個重要議題,在所有提供資訊安全服務的措施中,密碼系統提供了最大的彈性及安全性。在一個密碼系統中,存在著一些必要的、關係到安全性的初始值、公開金鑰或秘密金鑰必須被產生,這些數值由於攸關整個密碼系統的安全度,因此必須要是隨機的、無法預測的,亂數產生器即負責用來產生這些憑空而得(非由演算而得)的數值。一般來說,亂數產生器的優劣與密碼系統演算法的好壞是決定一個密碼系統安全度的兩大重要因素。
為了配合實驗室的ACP/NP計劃,本論文試著採用三種不同的方式來實現真實亂數產生器。對於混亂離散時間(Discrete-Time Chaos)的方式,本論文提出在設計電路時可能會遇到的問題並加以解決,由於此種方式是以類比電路實現出一具有良好分布性質的數學公式,因此其模擬結果可以通過NIST(National Institute of Standards and Technology)在2001年所提出的 “Security Requirements for Cryptographic Modules, FIPS PUB 140-2”中用來測試亂數亂度的所有要求。對於震盪器取樣(Oscillator Sampling)的方式,本論文提出增加其時脈雜訊的電路設計,並對其輸出亂數不能通過亂度測試的情況提出補償的辦法。對於以純數位電路實現真實亂數產生器的方式,本論文根據實際畫電路佈局並對其做後模擬(post simulation)所得的結果,發現其想法僅在理論上可行,在實際電路中並不可行。

As the government, the business, and many personal users are gradually adopting the electronic methods to store information, information security has been a highly noticed important issue. Among all the methods that can provide information security, cryptographic systems provide the maximum flexibility and safety. In a cryptographic system, there are some essential, safety-related initial values, public keys, and private keys needed to be generated. Because these values have something to do with the security of the whole cryptographic system, they need to be random and unpredictable. A random number generator is applied to generate these randomly produced (not calculated) values. Generally speaking, the security of a cryptographic system relies mainly on the goodness of both the algorithm and the random number generator.
In order to cooperate with the ACP/NP project, we tried to implement three different kinds of true random number generators. As for Discrete-Time Chaos method, we mentioned the problems that might occur when designing the circuit and proposed ways to solve them. Because we use analog circuit to implement a mathematically well-behaved equation, the simulation results can pass all the requirements for random data defined in “Security Requirements for Cryptographic Modules, FIPS PUB 140-2”, which is proposed by NIST (National Institute of Standards and Technology) in 2001. As for Oscillator Sampling method, we proposed a circuit that can increase the phase noise and a compensation method in case the outputs cannot pass the requirements for random data. As for the Pure Digital Circuit method, we concluded that this method is not practical in real case according to our drawing the layout and running the post simulation of the circuit.

中文摘要 ……………………………………………………………………… i
英文摘要 ……………………………………………………………………… ii
誌謝辭 ……………………………………………………………………… iii
目錄 ……………………………………………………………………… iv
表目錄 ……………………………………………………………………… vi
圖目錄 ……………………………………………………………………… vi
第一章 緒論………………………………………………………………… 1
第二章 問題分析…………………………………………………………… 9
2.1 化簡後Discrete-Time Chaos電路所發生之問題………………… 9
2.2 使用Oscillator Sampling方式所發生之問題...…………………... 12
2.3 使用純數位電路來產生亂數……………………………………… 14
2.4 現今研究上用來測試亂數產生器的條件………………………… 15
第三章 Discrete-Time Chaos電路設計……………………………………. 17
3.1 系統電路設計……………………………………………………… 17
3.2 相位產生器………………………………………………………… 20
3.3 比較器……………………………………………………………… 22
3.4 以NAND實現的SR latch………………………………………… 23
3.5 消除比較器bias的電路…………………………………………… 23
3.6 運算放大器………………………………………………………… 25
3.7 系統電路的行為…………………………………………………… 28
第四章 Discrete-Time Chaos電路模擬、佈局與驗證 …………………… 30
4.1 相位產生器模擬分析……………………………………………… 30
4.2 比較器模擬分析…………………………………………………… 33
4.3 運算放大器模擬分析……………………………………………… 35
4.3.1 start-up circuitry與bias circuitry模擬分析……………………….. 36
4.3.2 運算放大器主要電路行為模擬分析……………………………… 38
4.4 系統電路模擬分析………………………………………………… 39
4.5 電容在layout上的做法 ………………………………………… 41
4.6 系統電路的佈局…………………………………………………… 42
第五章 Oscillator Sampling電路設計……………………………………... 44
5.1 使用Oscillator Sampling方式所發生之問題及解決想法……….. 44
5.2 震盪器的選擇……………………………………………………… 45
5.3 電阻R的各種變異因子…………………………………………… 46
5.3.1 寬度飄移W ……………………………………………………… 47
5.3.2 溫度係數…………………………………………………………… 48
5.3.3 電壓係數…………………………………………………………… 48
第六章 Oscillator Sampling電路模擬、佈局與驗證……………………… 49
6.1 製程飄移變異度模擬……………………………………………… 49
6.2 操作環境變異度模擬……………………………………………… 51
6.3 電路佈局設計……………………………………………………… 55
第七章 Simple Binary Random Generator電路設計、模擬、佈局與驗證… 57
7.1 系統電路設計……………………………………………………… 57
7.2 不對稱性之模擬分析……………………………………………… 58
7.3 根據layout做post simulation的驗證…………………………….. 61
第八章 Discrete-Time Chaos亂數產生器輸出亂數之檢驗與分析………. 64
8.1 不同C1/C0比值和電阻R的模擬結果…………………………… 64
8.2 二條transfer curve的原因………………………………………… 72
8.3 不同C1/C0比值和電阻R的亂數測試結果……………………… 74
8.4 Saturation問題的消失與transfer curve彎曲問題的釐清………… 81
8.5 運算放大器的分析………………………………………………… 82
8.6 switched-capacitor circuit的分析………………………………….. 85
8.7 不同Vt的模擬結果……………………………………………….. 90
8.8 不同的transfer curve相似程度對亂數亂度的影響……………… 93
第九章 亂數產生器介面電路設計………………………………………… 95
9.1 AMBA AHB定義資料讀取之時序 ……………………………… 95
9.2 細部訊號分析及介面電路應具有的功能………………………… 96
9.3 介面電路架構……………………………………………………… 98
9.4 模擬結果…………………………………………………………… 101
第十章 結論與展望………………………………………………………… 103
10.1 結論………………………………………………………………… 103
10.2 展望………………………………………………………………… 103
附錄 (2.1)式到(2.4)式的推導過程………………………………………. 105
參考文獻 ……………………………………………………………………… 107

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8. National Institute of Standards and Technology, “Security Requirements for Cryptographic Modules”, FIPS PUB 140-1, January 11, 1994.
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