跳到主要內容

臺灣博碩士論文加值系統

(3.238.225.8) 您好!臺灣時間:2022/08/09 01:05
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

: 
twitterline
研究生:莊益嘉
研究生(外文):Chuang Yi-Chia
論文名稱:離散餘弦轉換至離散小波轉轉碼器之設計研究
論文名稱(外文):VLSI Architecture Design of DCT-based to DWT-based Image Transcoder
指導教授:陳永昌陳永昌引用關係
指導教授(外文):Chen Yung-Chang
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:51
中文關鍵詞:離散餘弦轉換離散小波轉換轉碼器心臟的提升的
外文關鍵詞:DCTDWTTranscodersystoliclifting
相關次數:
  • 被引用被引用:0
  • 點閱點閱:174
  • 評分評分:
  • 下載下載:35
  • 收藏至我的研究室書目清單書目收藏:1
以小波轉換為基礎的影像壓縮技巧正廣泛地被較新穎的影像壓縮標準所採用,例如JPEG 2000 和 MPEG 4. 儘管小波轉換擁有較高的壓縮效率和壓縮彈性等優點,比較舊的影像壓縮技巧,離散餘弦轉換轉換,仍然被比較舊的影像壓縮標準,例如 MPEG1, MPEG2和H.263 所採用.因為如此,目前的影像壓縮技巧是離散小波轉換和離散餘弦轉換所用存的狀態,我們試著設計出一個離散餘弦轉換至離散小波轉換的轉碼器,如果我們擁有這種轉碼器,比較舊的影像壓縮技巧(離散餘弦轉換)和比較新的影像壓縮技巧(離散小波轉換)之間的不相容性將被解決.
如同被廣為所知的,離散小波轉換和離散餘弦轉換由各自的數學式子所組成,許多快速小波轉換和快速離散餘弦轉換正因為分解她們各自的數學式子而被發明出來,除了數學式子的分解之外,離散小波轉換和離散餘弦轉換所各自擁有的對稱性和本身濾波器係數的特性都能夠用來在硬體上加快他的運算速度和節省他的晶片面積.在我們目前的研究當中,我們用矩陣運算的方法去試著研究看看是不是存在著一些方法可以節省我們的轉碼器的運算時間和晶片面積,矩陣運算的研究方法和數學式子上的分解相當類似.因此,我們根據了矩陣運算的方法發展出了幾種離散餘弦轉換對離散小波轉換轉碼器的硬體設計.在這一篇論文當中,我們對我們的矩陣運算研究方法做了一個總結.有一些轉碼器擁有較小的晶片面積,運算時間卻較長.而有些運算時間會比較短,卻必須要犧牲一些晶片面積.
根據TSMC 所提供的.35 cell library, 我們所設計的轉碼器都能夠到達50MHZ的clock頻率,針對我們所設計出來的轉碼器的各項比較將會在這篇論文中說明.

The wavelet-transform based image compression technique has been widely used in the newest image compression standards, such as JPEG200 and MPEG4. In spite of high compression rate and flexibility in the ultilization of wavelet-transform, older image compression technique, DCT-transform is still used in the older image compression standards, such as MPEG1, MPEG2 and H.263. Because of the coexistence of DCT-transform and DWT-transform, we try to design a DCT to DWT transcoder. If we have this kind of transcoder, the incompatibility between older image compression standards and newer one will be resolved.
It’s well known that DCT-transform and DWT-transform are composed of their own mathematical equations. Many Fast DCT-transform and Fast DWT-transform algorithms have been developed by factorizing these equations. Beside factorization, some properties, like symmetry and particular coefficients can be used to speed up the hardware computation speed and reduce chip area. In our current research, we use matrix operation to investigate if there exists some ways to meet the requirements. This kind of investigation is similar to mathematical equation factorization. Accordingly, we have developed different kinds of hardware architectures of the DCT to DWT trascoder. In this thesis, we summarized our matrix operation investigation. Some architectures have less area but lower computation speed and others have higher computation speed but must sacrifice its own area.
By the TSMC .35um cell-library, each of the proposed transcoder in this research achieves 50-MHz working speed. Comparisons between each of them are shown later.

Chapter 1 Introduction
1.1 DCT-transform and DWT-transform
1.2 Motivation
1.3 Thesis organization
Chapter 2 Mathematical Theory on Transcoding
2.1 Overview of some transcoding methods
2.2 Mathematical theory on DCT-to-DWT transcoding
Chapter 3 Implementation of Transcoder Architecture
3.1.1 Investigation result of new transcoding theory
3.1.2 Lifting scheme
3.2 Hardware implementation of new transcoder architecture
3.3 A faster architecture design by new transcoding
algorithm
3.4.1 Systolic VLSI Architectures
3.4.2 Further consideration of DCT-to-DWT Systolic
Architectures
Chapter 4 Comparisons on Proposed Architectures
4.1 Lifting-based DCT-to-DWT transcoder architecture
4.2 Systolic-based DCT-to-DWT transcoder architecture
4.3 Comparisons between DCT-to-DWT transcoding designs
Chapter 5 Conclusion and Future works
Reference

[1] Niklas Bjork and Charilaos Christopoulos, “Transcoder Architecture for Video Coding” IEEE Trans. on Consumer Electronics, v44, n1, pp88-98, February 1998.
[2] Po-Chin Hu; Kaveh, M.; Zhi-Li Zhan. ”A wavelet to DCT progressive image transcoder.” Proceedings. 2000 International Conference on Image Processing, Volume: 1, 2000 Page(s): 968 —971
[3] Ming-Fu Lan, Yung-Chang Chen, ”Architecture Design and VLSI Implementation of DCT-based to DWT-based Image transcoder.” M.S Thesis, Department of Electronic Engineering, NTHU,2001.
[4] Jui-Hua Li and Nam Ling, “Architecture and Bus-Arbitration Schemes for MPEG-2 Video Decoder.” IEEE Transactions on Circuits and Systems for Video Technology Vol.9,No.5,August 1999.
[5] Ein-Tin Yang, Bing-Fei Wu, ”2-D Discrete Wavelet Transform Chip Design.” M.S Thesis, Department of Electrical and Control Engineering NCTU,1999.
[6] Wim Sweldens, “The Lifting Scheme : A New Philosophy in Biorthogonal Wavelet Constructions” Department of Computer science, Katholieke Universities, Leuven Belgium,1997.
[7] Wim Sweldens and Ingrid Daubechies, “Factoring Wavelet Transform into Lifting Steps” Department of Computer science, Katholieke Universities, Leuven Belgium,1998.
[8] Chung-Jr Lian, Kuan-Fu Chen, Hong-Hui Chen, and Liang-Gee Chen, “Lifting Based Discrete Wavelet Transform Architecture for JPEG2000” Circuits and Systems, 2001. The 2001 IEEE International Symposium on ISCAS 2001., Volume: 2 , 2001 Page(s): 445 -448 vol. 2
[9] Shawmin Lei, “An introduction to JPEG-2000” Sharps Labs of America, July 2001.
[10] Denk, T.C.; Parhi, K.K. “Systolic VLSI architectures for 1-D discrete wavelet transforms” Conference Record of the Thirty-Second Asilomar Conference on Signals, Systems & Computers, 1998., Volume: 2 , 1998 Page(s): 1220 -1224 vol.2
[11] Wang Xing Guo; Zheng Wei Guo; Ahmad, and Ishfaq Ahmad “MPEG-2 To MPEG-4 MPEG-4. 2001 Proceedings of Workshop and Exhibition on Transcoding” , 2001 Page(s): 83 -86
[12] Ja-Ling Wu; Shiao-Jiuan Huang; Yuh-Ming Huang; Chiou-Ting Hsu; Jiun Shiu “An efficient JPEG to MPEG-1 transcoding algorithm” IEEE Transactions on Consumer Electronics, Volume: 42 Issue: 3 , Aug. 1996 Page(s): 447 -457
[13] Coding of Still Picture: JPEG2000 Part I Final Committee Draft Version 1.0, ISO/IEC JTC 1/SC 29/WG 1(ITU-T SG8), Mar. 2000.
[14] Qi Wang; Ghanbari, M. “Scalable coding of very high resolution video using the virtual zerotree” Circuits and Systems for Video Technology, IEEE Transactions on , Volume: 7 Issue: 5 , Oct. 1997 Page(s): 719 -727
[15] Po-Cheng Wu and Liang-Gee Chen, “An Efficient Architecture for Two-Dimensional Discrete Wavelet Transform”,IEEE Transaction on Circuits and Systems for Video Technology, VOL.11,NO.4,April 2001.
[16] Mohan Vishwanath, Robert Michael Owens, and Mary Jane Irwin, “VLSI Architecture for the Discrete Wavelet Transform.” IEEE Transactions on Circuits and System-II: Analog and Digital signal processing, VOL 42, NO.4, May 1995.

QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top