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研究生:陳世芳
研究生(外文):Sih Fang Chen
論文名稱:具有理想對數響應之可測CMOS影像感測器之整合
論文名稱(外文):The Integration of a Testable CMOS Image Sensor with Ideal Logarithmic Output Response
指導教授:黃錫瑜黃錫瑜引用關係
指導教授(外文):Shi-Yu Huang
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:38
中文關鍵詞:影像感測器對數響應類比-數位轉換器
外文關鍵詞:CMOS Image SensorLogarithmic ResponseAnalog-to-digital Converter
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本論文提出以0.35μm 1P4M 互補式金氧半導體製程設計並製造之具有近似於對數響應的CMOS影像感測器(CMOS Image Sensor)晶片。並且針對設計流程發展出一套系統階層的模擬方法,可以模擬出晶片所擷取之影像,幫助設計者在設計過程中的各個階段評估各元件對於晶片性能之影響並加以改進。
此一系統階層的模擬環境,乃是藉由對影像感測晶片內部訊號流路之分析為基礎,進一步架構出整個晶片內部各元件之模型。再經由針對各元件詳細之佈局後模擬,得到各元件之特性曲線,以作為模擬環境之各項參數。藉由此一模擬環境,設計者可在晶片設計之各階段,驗證各元件之設計,並針對不符合需求之處預先改善,以彌補設計流程之不足。
另外,本文亦提出一”多重解析度”的概念,可以藉由改變CMOS影像感測器內建之數位-類比轉換器(A/D Converter)之轉換曲線,使得影像感測器的最終輸出可以得到近似對數曲線之響應。如此可提高CMOS影像感測器在低照度下的影像品質,並維持原有之動態範圍。
經由本文所提出系統階層的模擬環境之模擬結果,顯示出影像感測晶片中內建之多重解析度類比-數位轉換器,確實使得輸出影像之輸出響應近似於理想之對數曲線。亦即影像感測器在低照度時的輸出影像更為清晰,並且能夠同時保持其高動態範圍的特性。
本文的組織如下:
在第一章中,首先針對本文所需之背景知識、研究動機及目的做詳細之說明。
在第二章中,分析了CMOS影像感測器晶片內部的訊號路徑,並對該路徑上的所有元件進行詳細的佈局後模擬,藉以建構系統階層的模擬環境。
在第三章中,提出了兩種藉由改變CMOS影像感測器內建之類比-數位轉換器之轉換曲線,而使得影像感測器的最終輸出可以得到改善的方法。在詳細討論之後,其中較有利的方法被應用於實際之測試晶片的設計之上。
在第四章中,針對於QCIF 格式之CMOS影像感測器測試晶片的實現過程及結果,有詳細介紹及討論。並且用第二章所述之建構系統階層的模擬環境,模擬了晶片所抓取之影像並進行分析。
在第五章,針對本文下了最終的結論。

In this thesis, a CMOS image sensor (CIS) with ideal logarithmic response designed and fabricated in 0.35μm 1P4M n-well CMOS process is presented. A system level simulation environment that can simulate the images captured by an image sensor is also developed to help the designer to estimate how the components in a CMOS image sensor will affect the quality of output image. Then the designer can modify the characteristics of the components of the CMOS image sensor to get better output response.
Moreover, a new concept of “multi-resolution” is proposed to modify the output response of a CMOS image sensor by modifying the transfer curve of the built-in Analog-to-Digital converter. After the modification, the output response of a CMOS image sensor approaches to an ideal logarithmic curve. Then the quality of the captured image can be improved under low illumination and, at the same time, the dynamic range of the CMOS image sensor will not be decreased at all.

Abstract (Chinese)……………………………………………i
Abstract (English)……………………………………………ii
Acknowledgement…………………………………………………iii
Contents…………………………………………………………iv
Chapter 1 Introduction
1.1 Background……………………………………………………2
1.2 Motivation……………………………………………………5
1.3 Organization of This Thesis……………………………6
Chapter 2 System Level Simulation Environment
2.1 The Signal Flow inside CIS………………………………7
2.2 The Behavior Model of CIS…………………………………9
2.3 The Simulation Environment Application………………11
Chapter 3 ADC Transfer Curve Modification
3.1 Direct Mapping Method………………………………………14
3.2 Multi-Resolution Concept…………………………………17
3.3 Output Response of the CIS with Multi-Resolution ADC…20
Chapter 4 QCIF CIS Test Chip Implementation
4.1 Design Flow of QCIF Test Chip……………………………22
4.2 Architecture…………………………………………………24
4.3 Experimental Results………………………………………28
Chapter 5 Conclusion………………………………………………34
Bibliography…………………………………………………………35

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