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研究生:譚仕煒
研究生(外文):Shih-Wei Tan
論文名稱:次微米閘極微波元件研究
論文名稱(外文):Study of Sub-Micrometer Gate Microwave Device
指導教授:羅文雄羅文雄引用關係
指導教授(外文):Wen-Shiung Lour
學位類別:碩士
校院名稱:國立海洋大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:92
中文關鍵詞:次 微 米 閘 極微 波 元 件
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  • 被引用被引用:0
  • 點閱點閱:175
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在本論文中,我們提出一個新穎的次微米閘極製程來縮小閘極線寬並且介紹及建立習知的V形谷閘極結構與製造方法。我們先使用光學石印的方式定義出1微米的閘極線寬,接著使用眾所週知的光阻回流技術及旋轉塗佈玻璃材料即可容易且可靠的得到0.6微米的閘極線寬。在習知的V形谷閘極結構方面,我們提供一系列可控制的V形谷閘極結構的濕蝕刻規則。根據以上兩種方式所得到的閘極結構,可以非常容易且廉價的得到有效的次微米閘極線寬來增強其元件在直流及交流的特性,我們並且以電腦軟體模擬及實驗兩種方式來證明以上的觀點。除此之外、我們更提出雙V型谷閘極結構來改善次微米閘極中的短通道效應

We provided a novel sub-micron gate process technique for reducing the gate length and introduced the conventional V-groove gate structure in this thesis. Before using the conventional photolithography to define the gate length with 1μm, we can easy and reliably perform the sub-micron gate length with 0.6μm by using the everybody-know photoresist re-flow and the spin-on-glass (SOG) film. In the conventional V-groove gate structure, we provided the wet etching rules to perform the V-groove gate structure as desire. By these ways, it is very easy and inexpensive to perform the sub-micron gate length and enhance the DC and RF characteristic. We employed the semiconductor’s simulation software and experiment to prove these arguments. In the other hand, we offer the dual V-groove gate structure to improve the short channel effect efficiently.

CONTENTS
Abstract
Figure Captions
Chapter 1 Introduction ------------------------------------1
Chapter 2 Technology --------------------------------------4
2-1 The V-groove Gate Technology --------------------------4
2-1-1 Introduction ----------------------------------------4
2-1-2 Technology ------------------------------------------5
2-1-3 Summarization ---------------------------------------9
2-2 The Photoresist Re-flow and SOG etching technology ---10
2-2-1 Introduction ---------------------------------------10
2-2-2 Technology -----------------------------------------11
2-2-3 Summarization --------------------------------------14
2-3 Conclusion -------------------------------------------15
Chapter 3 Simulation -------------------------------------16
3-1 Introduction -----------------------------------------16
3-2 The device structure and analytic model ---------------17
3-2-1 The MESFET structure and simulation model ----------17
3-2-2 The pseudomorphic doped-channel HFET
structure and simulation model ---------------------------19
3-2-3 The dual-V-groove gate pseudomorphic doped-channel HFET structure and simulationmodel ----------------------------21
3-3 Results and discussion -------------------------------23
3-3-1 The MESFET DC characteristic and discussion --------23
3-3-2 The pseudomorphic doped-channel HFET DC characteristic and discussion -------------------------------------------35
3-3-3 The dual V-groove gate pseudomorphic doped-channel HFET DC characteristic and discussion -------------------------44
3-4 Conclusion -------------------------------------------55
Chapter 4 Experiment -------------------------------------56
4-1 Introduction -----------------------------------------56
4-2 The Metal Semiconductor Field Effect Transistor ------57
4-2-1 Device Structure and Fabrication -------------------57
4-2-2 Results and Discussion -----------------------------66
4-3 The Pseudomorphic Doped-Channel Heterostructure Field
Effect Transistor ---------------------------------------71
4-3-1 Device Structure and Fabrication -------------------71
4-3-2 Results and Discussion -----------------------------80
4-4 Conclusion -------------------------------------------87
Chapter 5. Conclusion and Expectation --------------------88
Reference ------------------------------------------------89

REFERENCES
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