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研究生:呂炎龍
研究生(外文):Lu Yen-Lung
論文名稱:應用動態擾動單一位元積分三角調變技術之音頻數位類比轉換器設計與實現
論文名稱(外文):Design and Implementation of Dynamically Dithered Single-Bit Sigma-Delta Modulation Systems Used in Audio DACs
指導教授:曹恆偉曹恆偉引用關係
指導教授(外文):Hen-Wai Tsao
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電機工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:61
中文關鍵詞:積分三角三角積分超取樣再量化擾動噪訊移減單一位元數位類比轉換器
外文關鍵詞:sigma-deltadelta-sigmaoversamplingrequantizationdithernoise-shapingsingle-bitdigital-to-analog converter
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此論文乃研究應用於音頻數位類比轉換之高階單一位元數位積分三角調變器設計。評估此數位調變系統之標準主要有二:一、訊號對雜訊比;二、系統輸入動態範圍。積分三角調變器不可避免會產生週期雜音之現象(tonal behavior),這種現象在音樂領域之運用中必須適當壓抑,甚至消除。在此研究中,我們設計了一個數位積分三角調變系統,包含一個三階串接積分器多路回授(Cascade-of-integrators, multiple feedback)積分三角調變器,一個五階128倍升頻濾波器,以及一個動態擾動產生器。擾動技術(dithering techniques)對數位音樂而言是不可或缺的。我們在調變系統設計中,於量化器之前添加一個動態擾動信號,以消除調變所產生之週期雜音,並使對系統之負面效應減至最低。整個數位調變系統最後並以FPGA進行驗證,所得之訊噪比圖比起未加入擾動信號之情況很明顯更加線性。而系統之動態範圍與訊噪比分別為108 dB和110 dB。

Abstract
This study investigates the design of high-order single-bit sigma-delta audio DAC. The performance metrics of the digital sigma-delta modulation system consist of signal-to-noise ratio and dynamic range. The inherent tonal behavior of sigma-delta modulators should be suppressed, or even eliminated. We design a digital sigma-delta modulation system, including a 3rd-order CIFB modulator, a 5-stage 128x interpolator and a dynamic dither generator in this study. Dithering techniques are indispensable for digital audio. In our design, we eliminate the idle-tones effectively by adding an appropriate dither signal before the quantizer while minimizing the degradation of dynamic range. The overall system is programmed into FPGA, and the measured SNR plot is quite linear compared to an undithered one. The dynamic range and signal-to-noise ratio are 108 dB and 110dB, respectively.

Acknowledgements………………………………………………………………….i
Abstract…..…………………………………………………………………………ii
Table of Contents………………………………………………………………….vii
1 Introduction ……………………………………………………………………1
1.1 Organization……………………………………………………………………………… 2
2 Sigma-delta Modulator Fundamentals ………………………………………4
2.1 Introduction ………………………………………………………………………………4
2.2 Quantization Noise …………………………………………………….…………………4
2.3 Oversampling Technique …….……………………………………………………….…10
2.4 Noise-Shaped Sigma-Delta Modulator ……………………………………………...….12
2.5 First-Order Sigma-Delta Modulator …………………………….…….…………………13
2.6 Second-Order Sigma-Delta Modulator …………………….………………………….…16
2.7 High-Order Sigma-Delta Modulators ……………………………………………………18
2.7.1 Single-Stage High-Order Sigma-Delta Modulators………………………………20
2.7.2 Multi-Stage Noise Shaping Sigma-Delta Modulators………………….…………23
2.8 Multi-bit Sigma-Delta Modulators……………………………………………….………24
2.9 Summary…………………………………………………………………………………25
3 Design of High-Order Single-Bit Sigma-Delta Modulators Used in Audio DAC’s …………………………………………………………………………26
3.1 Introduction………………………………………………………………………………26
3.2 Design of Noise Transfer Function………………………………………………………28
3.3 Noise-Shaped Loop Topologies for Single-bit Sigma-Delta DAC………………………31
3.4 Stability of High-order Sigma-Delta Modulators ………………………………….…… 31
3.5 Linearization Dithering and Sigma-Delta Modulation ………….……………….………33
3.6 Whitening Dithering ……………………………….………………………………….…35
3.7 Summary………………………………………………………………………….………37
4 Implementation of Third-Order Single-Bit Sigma-Delta Modulator and Dithering …………………………………………….…………………..……38
4.1 Introduction………………………………………………………………………………38
4.2 Optimization of Zeros and Pole Arrangement……………………………………………38
4.3 Coefficient Computation and Quantization………………………………………………40
4.4 Short-term Tonal Spectrum………………………………………………………………42
4.5 Nonsubstractive Dithering……………………………………..…………………………45
4.6 Dynamic Dithering………………………………………………………….……………49
4.7 FPGA Implementation of Sigma-Delta Modulation System …………………….………51
4.8 Experimental Results ………………………………………….…………………………54
5 Conclusion ….………….…………………….……………………………….59
Bibliography ………………………………………………………………………60

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