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研究生:胡偉毅
研究生(外文):HU WEI YI
論文名稱:無線區域網路CMOS發送器前端之設計及實作
論文名稱(外文):Design and Implementation of a CMOS Transmitter Front-End for 802.11b Wireless LAN
指導教授:陳少傑陳少傑引用關係
指導教授(外文):CHEN SAO JIE
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電機工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
中文關鍵詞:無線區域網路發送器802.11b
外文關鍵詞:WLANTransmitter802.11b
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中文摘要
電子時代的來臨,造就人類便利的生活環境,家電、多媒體豐富了家庭及大眾生活,電子醫療儀器幫助醫生做最有效、準確的判斷,在在顯示電子對人類生活深邃的影響,而如今,通訊更是拉近你我彼此間的距離,網路的發達、行動電話的普及,使得即使分隔二地,亦能傳達彼此訊息,亦使得人類生活的範圍得以擴大至全世界。
現今為一知識爆炸時代,隨時隨地都要能吸收新知,雖然Internet打破國界限制,使資料取得可藉由網路即時傳送,然而連上網路多半仍侷限於需要一台主機及網路線,使得上網地點受限,為彌補這個缺失,於是無線區域網路(WLAN)的架構因應而生,而802.11b正是此架構下所提出的解決方案之一。
目前現有的802.11b產品皆為採用多顆IC組合為主,如此不僅在整合、價格及體積上皆不盡理想,亦使得產品無法普及。本實驗室的計劃著重於RF Front-End的設計,且為因應SOC的觀念,採用可與數位電路整合的CMOS製程,俾使達到Single Chip的目的,計劃分為五部分,分別為:接收器前端(Rx Front-End)、 壓控振盪器(VCO)、 鎖相迴路(PLL)、 發送器前端(Tx Front-End) 和中頻電路(IF)。本論文將針對發送器前端設計部分,提出包含升頻轉換混波器 (Up-Conversion Mixer)、 前置功率放大器(Pre-Amplifier)的設計,以CMOS之製程進行製作以利於發送器的整合。
本論文以產品為導向,故考慮ESD電路及封裝方式來進行模擬,所設計之升頻轉換混波器為一双端轉單端之混波器(Active Up-Conversion Mixer),利用Gilbert Cell架構為核心,後接一双端轉單端之電路,將中頻訊號與本地震盪之訊號混波成為高頻訊號,最後送至前置功率放大器。而前置功率放大器採用二級之Class-A type Pre-Amplifier,由於為On Chip Solution,升頻轉換混波器及前置功率放大器均整合成Single Chip,所以升頻轉換混波器之輸出經由AC訊號耦合後直接連接至前置功率放大器,故前置功率放大器不需作輸入阻抗匹配電路,且一、二級之Inductor Load與輸出阻抗匹配電路均為On Chip,藉此增加晶片之整合性,以達到One Chip為目的。
本計劃採用TSMC 0.25um CMOS製程,主要架構為超外差式Transceiver架構,射頻(RF)為2.374GHz,中頻(IF)為374MHz,本地振盪頻率(LO)為2GHz,電源供應(Vdd)為2.7V。所設計之升頻轉換混波器規格:5dB之Power Gain,-9dBm的Output P-1dB,-4dBm的IIP3和8mA的電流消耗。而在前置功率放大器方面,其規格:20dB之Power Gain,5dBm的Output P-1dB,-5dBm的IIP3和20mA的電流消耗。

ABSTRACT
With the growth of Internet, we can always on-line update our information and knowledge. Moreover, we hope that people can be connected to the Internet anywhere without wire. Wireless Local Area Network (WLAN) is a new idea for mobile communication that helps us to communicate with each other everywhere.
Two years ago, our lab started the research of 802.11b WLAN front-end circuit design. The project of 802.11b transceiver front-end can be classified into five parts: Receiver Front-End (Rx Front-End), Voltage Control Oscillator (VCO), Phase Lock Loop (PLL), Transmitter Front-End (Tx Front-End) and Intermediate Frequency (IF) Circuit. This Thesis emphasizes the CMOS transmitter front-end design and implementation in order to combine the RF front-end components into a single chip. The transmitter front-end circuits include Up-Conversion Mixer and Pre-Amplifier. Our attempt is to integrate the above five parts into a single chip IC product. To achieve this target, ESD Circuit, Package Model, and transmission line effect on PCB should be considered.
Our Up-Conversion Mixer is designed to convert the IF signal into an RF signal using an LO signal. Based on the Gilbert Cell structure, we use a differential-in and differential-out architecture. That is, an additional “differential to single-end” style of conversion circuit is applied following the Gilbert Cell Mixer in our design. Our differential to single-end circuit combines two differential voltages into a single-ended voltage to eliminate the even harmonic components and delivers the RF signal to a Pre-Amplifier. Here, the Pre-Amplifier is a Class-A type amplifier with two gain stages. Considering the integration, the Up-Conversion Mixer and Pre-Amplifier are designed as inside components in a chip to save output matching for the Up-Conversion Mixer and input matching for the Pre-Amplifier. The two inductors of the Pre-Amplifier are on-chip inductors. As to the output matching of Pre-Amplifier, it was designed as an on-chip output matching without using discrete RLC components.
Our project uses TSMC 0.25um CMOS RF Models. The transceiver architecture is a superheterodyne transceiver architecture. RF signal is located on 2.374GHz, IF signal located on 374MHz, and LO signal located on 2GHz. Power supply is 2.7V. The specifications for the Up-Conversion Mixer are 5dB in power gain, -9dBm in Output P-1dB, -4dBm in IIP3, and 8mA in current consumption. For the Pre-Amplifier, there is 20dB in power gain, 5dBm in Output P-1dB, -5dBm in IIP3, and 20mA in current consumption.

TABLE OF CONTENTS
LIST OF FIGURES
LIST OF TABLES
ABSTRACT CHINESE……………………………………………………….. A-1
ABSTRACT……………………………………………………………………. B-1
CHAPTER 1 INTRODUCTION……………………………………………. 1
1.1 802.11b Specification Review…………………………………………. 2
1.1.1 DSSS (used in 802.11b)………………………………………… 2
1.1.2 Receiver and Transmitter Specification in 802.11b…………….. 3
1.2 Design Background and Motivation…………………………………… 4
1.3 Thesis Outline………………………………………………………….. 5
CHAPTER 2 REVIEW OF TRANSMITTER ARCHITECTURES….…... 6
2.1 Direct-Conversion Transmitter Architecture…………………………… 6
2.1.1 Operation in a Direct-Conversion Transmitter……………….… 7
2.1.2 Problem of Leakage…………………………………………….. 8
2.1.3 Phenomenon of Injection Pulling……………………………….. 8
2.1.4 Improvements………………………………………………..…. 9
2.2 Two-Step Transmitter Architecture…………………………………..… 10
2.2.1 Operation in a Two-Step Transmitter…………………………… 10
2.2.2 Choice of IF Frequency……………………………………….... 11
2.3 Proposed System Architecture………………………………………..... 13
2.4 Basic Concepts in RF Design……………………………………..…… 14
2.4.1 Conversion Gain……………………………………………..…. 14
2.4.2 1-dB Compression Point…………………………………………15
2.4.3 Third-Order Interception Point…………………………………..16
2.4.4 Port Return Loss and Isolation………………………………..… 20
CHAPTER 3 DESIGN OF A 2.4GHz CMOS
UP-CONVERSION MIXER…………………………………. 21
3.1 Introduction to Mixer………………………………………………..… 21
3.1.1 General Considerations……………………………………….… 23
3.1.2 Mixer Topology……………………………………………….… 26
3.2 Circuit Design of Up-Conversion Mixer…………………………….… 30
3.2.1 Core Circuit Design (Gilbert Cell Mixer)…………………….… 31
3.2.2 Differential to Single-Ended (D2S) Converter…………………..35
3.2.3 Input Impedance and Frequency Response of Type I
D2S Converter…………………………………………………. 41
3.2.4 Schematic Circuit of Up-Conversion Mixer……………………. 43
3.3 Layout of Up-Conversion Mixer…………………………………….… 44
CHAPTER 4 DESIGN OF A 2.4GHz CMOS PRE-AMPLIFIER………… 46
4.1 Introduction to Power Amplifier………………………………………. 46
4.1.1 General Considerations…………………………………………. 47
4.1.2 Linear Power Amplifiers………………………….…………….. 49
4.2 Circuit Design of Pre-Amplifier……………………………………..… 54
4.2.1 Core Circuit Design…………………………………………..….55
4.2.2 Output Matching Design……………………………………..…. 58
4.2.3 Schematic Circuit of Pre-Amplifier…………………………..….59
4.3 Layout of Pre-Amplifier……………………………………………….. 60
CHAPTER 5 SIMULATION AND MEASUREMENT……………………. 62
5.1 Simulation Models…………………………………………………….. 62
5.1.1 Spiral Inductor Model…………………………………………... 62
5.1.2 MIM Capacitor Model…………………………………………. 64
5.1.3 RF MOS Model……………………………………………….... 65
5.2 Simulation Results of Up-Conversion Mixer………………………….. 66
5.2.1 Conversion Gain and 1-dB Compression Point……………….... 67
5.2.2 Conversion Gain Versus LO Power…………………………..… 68
5.2.3 Conversion Gain Versus IF Frequency……………………….… 69
5.2.4 Third-Order Interception Point (IP3)……………………………. 70
5.2.5 Transient Simulation……………………………………………. 72
5.2.6 Simulation Summary of Up-Conversion Mixer……………….... 72
5.3 Simulation Results of Pre-Amplifier…………………………………... 73
5.3.1 Power Gain and 1-dB Compression Point……………………… 74
5.3.2 S-Parameter Simulation………………………………………… 74
5.3.3 Stability Simulation…………………………………………….. 75
5.3.4 Third-Order Interception Point (IP3)……………………………. 76
5.3.5 Transient Simulation……………………………………………. 77
5.3.6 Simulation Summary of Pre-Amplifier……………………….… 77
5.4 Simulation Results of Transmitter Front-End………………………….. 78
5.4.1 Conversion Gain and 1-dB Compression Point……………….... 78
5.4.2 Conversion Gain Versus LO Power…………………………..… 79
5.4.3 Conversion Gain Versus IF Frequency……………………….… 80
5.4.4 Third-Order Interception Point (IP3)……………………………. 80
5.4.5 Transient Simulation……………………………………………. 82
5.4.6 Simulation Summary of Up-Conversion Mixer……………….... 82
5.5 Measurement…………………………………………………………... 83
CHAPTER 6 CONCLUSIONS AND FUTURE WORK……………..……. 89
6.1 Conclusions……………………………………………………………. 89
6.2 Future Work………………………………………..………………...… 90
REFERENCE
APPENDIX A SCHEMATICS
APPENDIX B POST-SIMULATION RESULTS

REFERENCE
[1] P. J. Sullivan, B. A. Xavier, and W. H. Ku, “Low Voltage performance of microwave CMOS Gilbert Cell Mixer,” IEEE Journal of Solid-State Circuits, Vol. 32, No. 7, pp. 1151-1155, July 1997.
[2] Qiuting Huang, Palol Orsatti, and Francesco Piazza, “GSM Transceiver Front-End Circuits in 0.25-um CMOS,” IEEE Journal of Solid-State Circuits, Vol. 34, No. 3, pp. 292-303, March 1999.
[3] Marc A. F. Borremans and Michiel S. J. Steyaert, “A 2-V, Low Distortion, 1-GHz CMOS Up-Conversion Mixer,” IEEE Journal of Solid-State Circuits, Vol. 33, No. 3, pp. 359-366, March 1998.
[4] S. Wu and B. Razavi, “A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications,” IEEE Journal of Solid-State Circuits, Vol. 33, No. 12, pp. 2178-2185, December 1998.
[5] J. C. Rudell, J. -J. Ou, T. B. Cho, G. Chien, F. Brianti, J. A. Weldon, and P. R. Gray, “A 1.9-GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless Telephone Applications,” IEEE Journal of Solid-State Circuits, Vol. 32, No. 12, pp. 2071-2088, December 1997.
[6] A. Rofougaran, J. Y. -C. Chang, M. Rofougaran and A. A. Abidi, “A 1GHz CMOS RF Front-End IC for A Direct-Conversion Wireless Receiver,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 7, pp. 880-889, July 1996.
[7] P. J. Sullivan, B. A. Xavier, and W. H. Ku, “A Common Source Input Cross Coupled Quad CMOS Mixer,” Analog Integrated Circuits and Signal Processing, 19, 181-188, 1999.
[8] Leonard A. MacEachern, and Tajinder Manku, “A Charge-Injection Method for Gilbert Cell Biasing,” IEEE, 1998.
[9] Behzad Razavi, “Architectures and Circuits for RF CMOS Receivers,” IEEE Custom Integrated Circuits Conference, 1998.
[10] M. orremans, and M. Steyaert, “A 2V, Low Power, Single-Ended 1GHz CMOS Direct Upconversion Mixer,” IEEE Custom Integrated Circuits Conference, 1997.
[11] Behzad Razavi, RF Microelectonics. Upper Saddle River, NJ: Prentice-Hall, 1998.
[12] Behazad Razavi, “A 900-MHz/1.8-GHz CMOS Transmitter for Dual-Band Applications,” Symposium on VLSI Circuits Degest of Technical Papers, 1998
[13] Behazad Razavi, “RF Transmitter Architectures and Circuits,” IEEE Custom Integrated Circuits Conference, 1999
[14] Ravi Gupta, Brian M. Ballweber, and David J. Allsto, “Design and Optimization of CMOS RF Power Amplifiers,” IEEE Journal of Solid-State Circuits, Vol. 36, No. 2, February 2001.

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