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研究生:徐啟舜
研究生(外文):Chi-Shun Hsu
論文名稱:CMOS電壓位準轉換器之電路分析與設計
論文名稱(外文):The Analysis and Design of CMOS Voltage Level Shifting Circuits
指導教授:周煌程
指導教授(外文):Hwang-Cherng Chow
學位類別:碩士
校院名稱:長庚大學
系所名稱:半導體科技研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:中文
論文頁數:103
中文關鍵詞:位準轉換電壓轉換
外文關鍵詞:Level Shiftingvoltage convert
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近年來由於積體電路製程技術的進步,電路操作的工作電壓也隨之越來越低,但不是每個電路皆會降低其工作電壓,因此為了達到高速且低功率消耗的目的,混合工作電壓是時常使用的方式,因此,在不同電壓的介面通常需要電壓位準轉換電路。
一個良好的位準轉換電路可以在高低壓介面傳遞正確的資料,並且具有較小的傳遞延遲。然而位準轉換電路也會有功率消耗,因此亦需把功率消耗列入為考量的參數,也就是說位準轉換電路必須有很小的傳遞延遲及很小的功率消耗,以達到高效能的CMOS電路。
本篇論文提出一個新的位準轉換電路之設計方法,利用這個設計的精神,加入了基極控制電路,因此可以改善原有電路的缺點,即改善上升傳遞延遲時間,降低上升傳遞延遲時間與下降傳遞延遲時間的不對稱性。除此之外,當轉換電壓降低時,本論文提出之電路在低電壓下工作經模擬驗證更具優勢。

With the advancement of the semiconductor processing technology, the supply voltage of integrated circuits is getting lower. However, not all circuits would lower their supply voltage. Thus, to obtain the advantage of both high speed and low power consumption, a mixed-voltage system is used frequently. Therefore, voltage level shifting circuits should be placed at the interface of different supply voltage components.
A good level shifting circuit can transmit correct data between different supply voltage components, and have a shorter propagation delay time. Moreover, level shifting circuits should also consume less power. Thus, to achieve high performance CMOS circuits, level shifting circuits must have a shorter propagation delay time and lower power consumption.
A new design method for level shifting circuits is presented in this thesis. With this design method, the body-controlled circuit is added to the prior art circuits, which will improve the circuit performance. Based on simulation results, the proposed circuits reduce the low-to-high propagation delay and improve the asymmetry between the low-to-high and the high-to-low propagation delay times. In addition, for reduced converting working voltage, this design still has more advantage without degrading its circuit performance.

指導教授推薦書
口試委員會審定書
授權書............................................................................................................................- iii -
誌謝................................................................................................................................- iv -
中文摘要........................................................................................................................- v -
英文摘要........................................................................................................................- vi -
目錄................................................................................................................................- vii -
圖目錄............................................................................................................................- x -
表目錄............................................................................................................................- xv -
第一章 緒論.................................................................................................................- 1 -
1.1 研究背景..........................................................................................................- 1 -
1.2 研究動機..........................................................................................................- 5 -
1.3 論文架構..........................................................................................................- 6 -
第二章 傳統電路的架構與分析..................................................................................- 7 -
2. 1 設計要求...........................................................................................................- 7 -
2.1.1 直流功率要求.............................................................................................- 7 -
2.1.2 交流特性要求...........................................................................................- 10 -
2.1.2.1 電路操作速度...................................................................................- 10 -
2.1.2.2 動態功率消耗...................................................................................- 11 -
2.1.3互補式或單一式輸入、輸出.....................................................................- 13 -
2.2 傳統及現有的電壓位準轉換器.....................................................................- 14 -
2.2.1 傳統反相器...............................................................................................- 14 -
2.2.2 傳統電壓位準轉換器..............................................................................- 15 -
2.2.2.1 傳統互補式電壓位準轉換器...........................................................- 16 -
2.2.2.2 傳統單一式電壓位準轉換器...........................................................- 18 -
2.2.3 現有的典型電壓位準轉換器..................................................................- 21 -
2.2.3.1 只具穩態的典型互補式電壓位準轉換電路...................................- 21 -
2.2.3.2 加入暫態的典型互補式電壓位準轉換電路(1)...............................- 24 -
2.2.3.3 加入暫態的典型互補式電壓位準轉換電路(2)...............................- 27 -
2.2.2.4 加入靴帶電路的典型單一式電壓位準轉換電路...........................- 31 -
2.3 討論.................................................................................................................- 34 -
第三章 位準轉換器之分析與設計............................................................................- 35 -
3.1 設計原理與機制.............................................................................................- 35 -
3.2 電路架構與操作原理.....................................................................................- 37 -
3.2.1 改良式電壓位準轉換電路(一)(proposed circuit 1) ...........................- 37 -
3.2.1.1 穩態分析...........................................................................................- 38 -
3.2.1.2 暫態分析...........................................................................................- 41 -
3.2.1.3 討論...................................................................................................- 43 -
3.2.2 改良式電壓位準轉換電路(二)(proposed circuit 2) ...........................- 43 -
3.2.2.1 穩態分析...........................................................................................- 44 -
3.2.2.2 暫態分析...........................................................................................- 46 -
3.2.2.3 討論...................................................................................................- 48 -
3.3 模擬分析與功能驗證.....................................................................................- 48 -
3.3.1 改良式電壓位準轉換電路(一)之模擬驗證............................................- 49 -
3.3.2 改良式電壓位準轉換電路(二)之模擬驗證............................................- 53 -
3.4 結論.................................................................................................................- 56 -
第四章 結果與討論....................................................................................................- 58 -
4.1 各電路模擬結果之比較.................................................................................- 58 -
4.1.1 3.3V轉5V................................................................................................- 58 -
4.1.2 2.5V轉5V................................................................................................- 68 -
4.1.3 1.8V轉3.3V............................................................................................- 75 -
4.1.4 討論..........................................................................................................- 82 -
4.2 設計可靠度之討論.........................................................................................- 83 -
4.3 佈局與模擬.....................................................................................................- 87 -
4.3.1 佈局..........................................................................................................- 87 -
4.3.2 佈局後模擬..............................................................................................- 89 -
4.3.3 佈局考量..................................................................................................- 90 -
4.3.3.1 閂鎖現象...........................................................................................- 90 -
4.3.3.2 閂鎖保護...........................................................................................- 91 -
4.4 結論.................................................................................................................- 93 -
第五章 總結................................................................................................................- 95 -
參考文獻........................................................................................................................- 97 -
附件 英文稿..............................................................................................................- 100 -

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[2] Williams, J., “Mixing 3-V and 5-V ICs,” IEEE Spectrum, Vol.30 Issue: 3,pp.40 -42 Mar 1993.
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[11] T. Kuroda et al., “A high-speed low-power 0.3 um CMOS gate array with variable threshold voltage(VT)scheme,” in Proc. IEEE Custom Integrated Circuits Conf. , pp. 53-56, May 1996.
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[13] J. S. Wang, S. J. Shieh, J. C. Wang, and C. W. Yeh, “Design of standard cells use low-power ASIC’s exploiting the multiple-supply-voltage scheme,” in Proc. IEEE Int. ASIC Conf., pp.119-123, 1998.
[14] Hwang-Cherng Chow, “CMOS LEVEL SHIFTING CIRCUIT,” US. Patent 5,698,993 , Dec. 16, 1997.
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[16] Satoru Masaki et al., “LEVEL CONVERTER FORCMOS 3V TO FROM 5V,” US. Patent 5,680,064 , Oct. 21, 1997.
[17] Adel S. Sedra, “MICROELECTRONIC CIRCUIT,” 4th Edition, 1998.
[18] 王進賢, “VLSI電路設計,” 1st Edition. Reading, Sep. 2000.
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[20] Behzad Razavi, “Design of Analog CMOS Integrated Circuits,” International Edition Reading, 2001.
[21] Bart R. McDaniel, “High Voltage CMOS Switch with Protection Against Diffusion to Well Reverse Junction Breakdown,” US. Patent 5,243,236 , Sep. 7, 1993.

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