就在幾年前，無線通訊領域與其應用開始快速地擴張與發展。而通訊系統亦膨脹的非常快，並且積體電路設計這個領域也隨著日益更新的通訊世界在萌芽茁壯。
這本論文主要研究一些符合無線區域網路(WLAN)的接收機與傳送機，並加以改善其操作特性。低中頻與直接轉換這兩種架構可說是目前最熱門的技術，因為這兩種架構外接元件少，極易積體化。接下來，GaAs HBT這等高速元件目前在高頻電路設計中逐漸嶄露頭角，而且5GHz系統將佔領RFIC主要市場，或者我們可說他的時代已經降臨。因此本論文的論點可說是順應了市場的趨勢。
RFIC設計的重點不只侷限於電路上的設計，更要考慮到晶片的測試問題，所以測量環境必須要跟得上RFIC設計的腳步。本篇論文所使用的On-wafer量測方法可說是很盛行但是不普遍，其原因在於這方法所需之設備的價錢簡直是個天文數字。總而言之，RFIC設計是個經驗與金錢堆積出來的王國。

Contents
Abstract (in Chinese)………………………………………………………………………...i
Abstract (in English)..………………….………………………………………………..ii
Acknowledgements…………………………………………………………………………iii
Contents……………………………………………………………………………………iv
List of Figures……………………………………………………………………………vii
List of Tables………………………………………………………………………………xii
Chapter 1…………………………………………………………………………..….1
Introduction………………………………………………………………………………...1
1.1 Wireless Communication…………………………………………………1
1.2 Full Integration…………………………………………………………2
1.3 Technology…………………………………………………………….…3
1.4 Thesis Organization…………………………………………………….…4
Chapter 2………………………………………………………………………..…….5
Architectures and Fundamentals…………………………………………………......5
2.1 Transceiver Architecture………………………………………………..…5
2.2 Receiver Front-End Architectures………………………………………...8
2.2.1 Heterodyne Receiver…………………………………………..8
2.2.1.1 The Single-Stage Heterodyne Receiver……………………..8
2.2.1.2 The Multi-Stage Heterodyne Receiver……………………..10
2.2.2 Homodyne Receiver………….………………………………..…….11
2.2.3 Low-IF Receiver………….…………………………………………...15
2.2.4 Wideband IF Receiver……….………………………………………..17
2.3 Transmitter Front-End Architectures…………….………………………18
2.3.1 Heterodyne Transmitter………………...…...………………………18
2.3.2 Direct-Conversion Transmitter……………………………………...20
2.3.3 Combined Transmitter………..……………………………………...21
2.4 Fundamentals of Design……………………………….………………..21
2.4.1 Noise Figure……………..……………………………………...21
2.4.2 Sensitivity………………..……………………………………...22
2.4.3 Linearity……………………..……………………………………...23
2.4.3.1 Gain Compression (P1dB)………………………………………24
2.4.3.2 Inter-modulation (IP3)…………………………………………25
2.4.4 Dynamic Range….…………..……………………………………...27
2.4.5 Stability……….…………..……………………………………...28
2.5 Summary…………………………………………….………………..29
Chapter 3…………………………………………………………………………….31
Complex Analysis……………....…………….…………………………………….31
3.1 Complex Signal Analysis………………………………………………32
3.2 Complex Downconverter…….……….…….………..………………...33
3.3 Hartley Image-rejected Architecture…….….………..………………...38
3.4 Weaver Image-rejected Architecture….…….………..………………...42
3.5 Polyphase System…………….……….…….………..………………...45
3.5.1 Passive Polyphase Filter….…..……………………………………...48
3.5.2 Active Polyphase Filter….…..……………………………………....51
3.6 Complex Upconverter….……….……….…….………..………………...55
Chapter 4…………………………………………………………………………….56
Achievements of Complex Downconverters and Upconverters…………….….56
4.1 Introduction to System………………………………….………….……...56
4.2 Mixers…………….………………………………………………………58
4.2.1 Gilbert Mixer..…………...…..……………………………………...60
4.2.2 Micro-Mixer………………..…………………………….………64
4.3 Double-Quadrature Down-Converter with Passive Polyphase Filter……..69
4.4 Double-Quadrature Down-Converter with Active Polyphase Filter………94
4.5 Single-Quadrature Down-Converter with Passive Polyphase Filter………95
4.6 Single-Sided Band Upconverter………………………………………..100
Chapter 5…………………………………………………………………………...106
Conclusion………………………………………………………………………….106
List of Figures
Chapter 1 ………………………………………………………………………………….1
Fig. 1.1 RF and Baseband chip-sets in a transceiver……………………………………...2
Chapter 2 ………………………………………………………………………………….5
Fig. 2.1 Block diagram of RF transceiver…………….…………………………………..6
Fig. 2.2 The typical transceiver topology………………………………………...……….7
Fig. 2.3 Block diagram of a single-stage IF receiver……………………………….….…9
Fig. 2.4 Image rejection spectrum for (a) high IF and (b) low IF……………………….9
Fig. 2.5 Dual-IF heterodyne receiver…………………..…………………………….….10
Fig. 2.6 The simple concept of homodyne receiver………………..…………………....12
Fig. 2.7 The problem of the frequency translations in a simple zero-IF receiver…….…12
Fig. 2.8 Block diagram of the quadrature homodyne receiver…….…………………….12
Fig. 2.9 Dynamic DC offsets in direct conversion (a) LO leakage, (b) a strong interferer...
………………………………………………………………………………14
Fig. 2.10 DC offsets removal in zero-IF receiver by means of a DSP…….…………..….14
Fig. 2.11 Even-order distortion on interferers…….………………………………………15
Fig. 2.12 Low-IF architecture…….………………………………………………………..16
Fig. 2.13 Digital-IF architecture…….…………………………………………………….16
Fig. 2.14 Wideband IF receiver architecture..…………………………………………….17
Fig. 2.15 The heterodyne transmitter architecture…..…………………………….…..…19
Fig. 2.16 The quadrature direct-conversion transmitter architecture……………….…. ...20
Fig. 2.17 The definition of P1dB…....……………………………….……………….…. ...24
Fig. 2.18 The effect of the third-order non-linearity……………….……………….…. ...25
Fig. 2.19 The definition of IP3……………….……………….…. .………………………26
Fig. 2.20 The relationship between linearity and dynamic range. .………………………28
Chapter 3 ………………………………………………………………………………….31
Fig. 3.1 Complex downconversion architecture…………………………………....…..33
Fig. 3.2 I/Q demodulator………………………………...…………………………….35
Fig. 3.3 The downconversion spectrum of a real mixer in (a) a heterodyne system and (b) a zero-IF system………………………………………………………………36
Fig. 3.4 The convolution of a complex zero-IF downconverter..………………….……37
Fig. 3.5 The convolution of a complex low-IF downconverter………….....…………...37
Fig. 3.6 Hartley image-rejected receiver architecture…………………………..……..39
Fig. 3.7 Image rejection ratio versus amplitude and phase mismatch in Hartley receiver...
……………………………………………………………………..……..41
Fig. 3.8 Weaver image-rejected receiver architecture..…………….……………..……..43
Fig. 3.9 Problem of secondary image in Weaver architecture.…….……………..……..43
Fig. 3.10 Double-quadrature downconverter………………….…….……………..……..44
Fig. 3.11 Spectrum of the image rejection ratio in (a) conventional complex
downconverter (b) double-quadrature downconverter…………………………45
Fig. 3.12 The operation principle of the passive RC-CR polyphase filter………..……..49
Fig. 3.13 The phase response of low-pass and High-pass filters……...…………..……..50
Fig. 3.14 Two-stage passive RC-CR polyphase filter.………..…….……………..……..51
Fig. 3.15 Linear low-pass to band-pass transformation…………….……………..……..52
Fig. 3.16 The translation of low-pass to band-pass filter in S-plane.……………..……..52
Fig. 3.17 The block schematic of active polyphase filter...…..…….……………..……..53
Fig. 3.18 The realization of active RC polyphase filter……..…….……………..………54
Fig. 3.19 Two ways of complex upconverter...…….……………………………..……..55
Chapter 4 …………………………………………………………………………………56
Fig. 4.1 Spectrum of the IEEE 802.11a………………………………………………….57
Fig. 4.2 Sub-channels details of the IEEE 802.11a…….…………………….………….58
Fig. 4.3 The function diagram of an ideal mixing operation…...……………………..58
Fig. 4.4 Block diagram of a Gilbert type mixer……………………………………….60
Fig. 4.5 Conventional Gilbert mixer…………………………………………...………..61
Fig. 4.6 The simulation of conversion gain to LO power…………..…………………62
Fig. 4.7 The simulation of spectrum for downconversion Gilbert mixer…...….…..……63
Fig. 4.8 The simulation of linearity...…………………………………………...….……63
Fig. 4.9 GaAs HBT Micro-mixer………………………………………………..………64
Fig. 4.10 Active balun at RF input port…..……………………...……………..………...65
Fig. 4.11 Conversion gain to LO power………………………………………………….66
Fig. 4.12 Input return loss of Micro-mixer…………….……………….….….………….67
Fig. 4.13 Input bandwidth…………………………...………………….……..…..……...67
Fig. 4.14 Output bandwidth………………………...….…………….……..…..………...68
Fig. 4.15 Linearity……………………..…………………...……………….……..…...…68
Fig. 4.16 Low-IF DQDC with polyphase filter for image rejection..……….……..…..…70
Fig. 4.17 Low-IF DQDC with polyphase filter for image rejection…….……..…….…...71
Fig. 4.18 Image rejection ratio to bandwidth with different cascaded stage...……..…..…72
Fig. 4.19 Output amplifier for gain loss compensation……………..……….……..…..…73
Fig. 4.20 The structure of four stages passive polyphase filter………….……..…..……..74
Fig. 4.21 The simulation of four stages passive polyphase filter.……….……..…..……..75
Fig. 4.22 The operation of passive RC-CR quadrature generator……….……..…..……..76
Fig. 4.23 The structure of two stages passive RC-CR quadrature generator…..…..……..76
Fig. 4.24 The simulation of two stages passive RC-CR quadrature generator..…..………77
Fig. 4.25 5GHz Rat-Race on PCB board…………………………………..…..…..……..78
Fig. 4.26 The S11 and S22 of 5GHz Rat-Race...…………………………..…..…..……..78
Fig. 4.27 The S11 and S44 of 5GHz Rat-Race...…………………………..…..…..……..79
Fig. 4.28 The S21 and S41 of 5GHz Rat-Race...…………………………..…..…..……..79
Fig. 4.29 The differential phase to port 1 of 5GHz Rat-Race.……………..…..…..……..80
Fig. 4.30 The magnitude mismatch between port2 and port 4 of 5GHz Rat-Race...……..80
Fig. 4.31 The 180 -phase error between port 2 and port 4 of 5GHz Rat-Race..…..……..81
Fig. 4.32 Two directional desired and image sequences at inputs of polyphase filters…..83
Fig. 4.33 Amplitude and phase quadrature errors…………...……………..…..…..……..84
Fig. 4.34 Representation of desired and error signals..……...……………..…..…..……..85
Fig. 4.35 The simulation of input return loss…...…………...……………..…..…..……..86
Fig. 4.36 The simulation of the image rejection (a) RF=5.2GHz (b) RF=5.14GHz.……..87
Fig. 4.37 Microphotograph of DQDC with polyphase filter...……………..…..…..……..88
Fig. 4.38 The measurement of conversion gain to LO power.……………..…..…..……..89
Fig. 4.39 The measurement of P1dB.……………..…..…..………………………………..89
Fig. 4.40 The measurement of IP3……………..…..…..………………………………….90
Fig. 4.41 The measurement of LO-IF isolation..…..…..………………………………….90
Fig. 4.42 The measurement of RF-IF isolation..…..…..………………………………….91
Fig. 4.43 The measurement of IF bandwidth.....…..…..………………………………….91
Fig. 4.44 The measurement of image rejection ratio (IRR)...…………………………….92
Fig. 4.45 The microphotograph of DQDC with active polyphase filter………………….94
Fig. 4.46 The measurement of image rejection…....…..………………………………….95
Fig. 4.47 SQDC with passive polyphase filter...…..…..………………………………….96
Fig. 4.48 Total circuit of SQDC with passive polyphase filter..………………………….97
Fig. 4.49 The simulated spectrum of SQDC with passive polyphase filter (a) desired IF (b)
unwanted IF……………………………………………………………………98
Fig. 4.50 The simulated input return loss of SQDC with passive polyphase filter……….99
Fig. 4.51 The layout of SQDC with passive polyphase filter…………………………...100
Fig. 4.52 The total circuit of single-sided band upconverter…………………….……...101
Fig. 4.53 The principle of LC currents combiner………………………………..………102
Fig. 4.54 The simulated spectrum of single-sided band upconverter…………….……...102
Fig. 4.55 The simulated input and output return loss…………………………….……...103
Fig. 4.56 The simulated conversion gain to LO power…………………………..……...103
Fig. 4.57 The simulated P1dB…………………………..…….…………………………..104
Fig. 4.58 Layout of single-sided band upconverter in two types of output matching…..105
List of Tables
Table 2-1 Relative comparisons of the receiver architectures…..……………….………29
Table 2-2 The equations of design indexes……………………..……………….………30
Table 3-1 Bases for multiphase systems…………………..……..………..……...……..47
Table 4-1 The summary of the properties of Micro-mixer..……………………....……..69
Table 4-2 The calculation of double-quadrature operation.……………………....……..83
Table 4-3 The calculation of desired and error signals…...……………………....……..86
Table 4-4 Summary of the measurement results of DQDC with passive polyphase
filter…………………………………………………………………………..93
Table 4-5 Summary of the simulated properties of SQDC with passive polyphase filter….
………….…………………………………………………………………….99
Table 4-6 Summary of the simulated properties of single-sided band upconverter……104

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