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研究生:黃信惇
研究生(外文):Shin-Duen Huang
論文名稱:先進互補式金氧半場效電晶體其閘極氧化層可靠度之探討
論文名稱(外文):Gate oxide reliability of advance CMOS device
指導教授:陳志方
指導教授(外文):Jone-Fang Chen
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:英文
論文頁數:87
中文關鍵詞:崩潰可靠度
外文關鍵詞:reliabilitybreakdown
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在此篇論文,我們取得業界的八吋晶元為作實驗的樣本,而因為元件逐漸微縮化的關係,因此一些像操作電壓以及一些原先的電性特徵值的改變比不上元件的縮小率,而且因為元件的氧化層面積及厚度也跟著變小,造成許多特徵值上的改變,因此氧化層的重要性逐漸的被人重視。而此實驗是要找出氧化層薄厚是否帶給元件那些特性表現上的不同處及找出崩潰前後電性上有何變化。
在一開始利用步階電壓及定電壓模式對元件做電性上的監控,並利用以往的崩潰定義,來做電性上的分析,以期找出氧化層薄厚之間對元件會有什麼影響,另外試著歸納是否有更確切的方式來定義元件是否崩潰。
以上的實驗我們以安捷倫科技公司(Agilent)所提供的軟體ICS(Interactive Characterization Software)來控制半導體參數分析儀(HP4155B)以及Keithley所提供的4200-SCS system做一連串的自動量測及參數擷取以達成我們的研究。
In this thesis, the sample is an 8inch wafer for 0.15μm technology n-MOSFET’s and p-MOSFET’s and we researched on oxide reliability. As devices scaling down, the device operational voltage and some characteristic still decreases slowly. The area and the thickness of the device oxide layer also decreased that varied the characteristic representation. So the dielectric oxide layer in MOSFET is to pay much attention to people. My experiment focuses on the difference between thin and thick oxide layer and finds the difference of the characteristic between before breakdown and after breakdown.
First, I use ramp voltage test and constant voltage test to confer the difference of the I-V changes. Then I use the past breakdown definition to analyze the I-V curve. I want to find what influence on device between thin and thick oxide layer. Besides, I try to generalize it has the more accurate way to define the device breakdown.
In these experiments, we used ICS (Interactive Characterization Software) to control HP4155B (Semiconductor Parameter Analyzer) produced by Agilent Technologies and 4200-SCS system produced by Keithley to finish various researches.
Abstract (Chinese) I
Abstract (English) II
Acknowledgements III
Contents IV
Figure Captions V
Table Captions X

Chapter 1 Introduction 1
Chapter 2 Measurement introduction
2.1 HP4155B I-V analysis tool 7
2.2 4200-SCS system 7
Chapter 3 Model introduction
3.1 Percolation 10
3.2 The comparison between constant current stress (CCS)
and constant voltage stress (CVS) 11
Chapter 4 Experiment Details, Result and Analysis 16
Chapter 5 Conclusion and Future Study
5.1 Conclusions 31
5.2 Future Study 32
Reference 33
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[8] Borse, D.G.; Vaidya, S.J.; Chandorkar, A.N.; “Study of SILC and interface trap generation due to high field stressing and its operating temperature dependence in 2.2 nm gate dielectrics” Electron Devices, IEEE Transactions on , Volume: 49 Issue: 4 , Apr 2002 Page(s): 699 -701
[9] Mullen, E.; Leveugle, C.; Molyneaux, J.; Prendergast, J.; Suehle, J.S.; “A technique to predict gate oxide reliability using fast on-line ramped Q/sub BD/ testing” Reliability Physics Symposium Proceedings, 2002. 40th Annual , 2002 Page(s): 292 -297
[10] Yider Wu; Qi Xiang; Bang, D.; Lucovsky, G.; Ming-Ren Lin; “Time dependent dielectric wearout (TDDW) technique for reliability of ultrathin gate oxides” IEEE Electron Device Letters , Volume: 20 Issue: 6 , Jun 1999 Page(s): 262 -264
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[16] Min-Yu Tsai; Horng-Chih Lin; Da-Yuan Lee; Tiao-Yuan Huang; “Post-soft-breakdown characteristics of deep submicron NMOSFETs with ultrathin gate oxide” IEEE Electron Device Letters , Volume: 22 Issue: 7 , Jul 2001 Page(s): 348 -350
[17] Teramoto, A.; Umeda, H.; Azamawari, K.; Kobayashi, K.; Shiga, K.; Komori, J.; Ohno, Y.; Miyoshi, H.; “Study of oxide breakdown under very low electric field” Reliability Physics Symposium Proceedings, 1999. 37th Annual. 1999 IEEE International , 1999 Page(s): 66 -71
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