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研究生:楊智偉
研究生(外文):Chih-Wei Yang
論文名稱:應用於極大型積體電路的高介電閘極絕緣層電特性及製程最佳化的研究
論文名稱(外文):Process Optimization and Electrical Characterization of High-K Gate Dielectric for ULSI Applications
指導教授:方炎坤方炎坤引用關係梁孟松陳世昌陳世昌引用關係
指導教授(外文):Yean-Kuen FangMong-Song LiangShih-Chang Chen
學位類別:博士
校院名稱:國立成功大學
系所名稱:電機工程學系碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:英文
論文頁數:135
中文關鍵詞:閘極絕緣層矽氧化鉿氧化鉿高介電材料
外文關鍵詞:HfO2HfSiOgate dielectrichigh-K
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  本論文探討應用於極大型積體電路的高介電閘極絕緣層的特性,並對其製程技術做最佳化的調整。研究的絕緣層包括氮化氧化矽薄膜,氧化鉿(HfO2)、矽氧化鉿(HfSiO)薄膜,及氮化的含鉿(Hafnium)氧化矽薄膜。
  對於氮化氧化矽薄膜的研究,吾人利用熱氧化法的方法先在矽基板上成長高品質的二氧化矽(SiO2)薄膜,再以氨氣熱氮化法(NH3 thermal nitridation)的方式將氮導入氧化矽中以提高其介電常數。研究結果顯示,以此法成長的氮化氧化矽薄膜不僅不會影響其原始物性厚度,含氮的濃度更可高達10%,在縮減厚度應用上具備絕佳的潛能。但在厚度低於15Å時漏電流亦高達1A/cm2,對於低功率、低漏電流等元件要求上已不符所需,必需尋求替代性的高介電材料。
其次,吾人利用原子層化學氣相沈積法(ALCVD)研製出高介電氧化鉿(HfO2)薄膜,並對其元件之物性與電特性加以分析。結果顯示氧化鉿薄膜的介電常數可達~23,有效降低漏電流6~8次方倍。此外,與複晶矽(polysilicon)閘極電極製程相容性上,吾人發現成長複晶矽所需的矽甲烷(SiH4)乘載氣體(carrier gas)具有決定性影響。在含氮乘載氣體中,成功將氧化鉿薄膜整合進CMOS製程裡,並透過氫、氧退火等製程最佳化步驟,展示出一顆氧化層厚度23Å、20%電子移動率衰減的電晶體特性。此外,對於電晶體高臨界電壓的問題上,我們認為複晶矽與氧化鉿薄膜的介面是造成高臨界電壓的主因,並提出機制模型來解釋。
  再則,我們利用金屬有機化學氣相沈積法(MOCVD)研製矽氧化鉿(HfSiO)薄膜,並對其元件之電特性與可靠度加以分析。實驗發現矽氧化鉿薄膜中的矽含量不但可提高薄膜的結晶溫度,且對電性厚度具有顯著的影響。對於沈積矽氧化鉿前的介面處理工程,吾人發現氨氣熱氮化矽基板方式具有調整元件平帶電壓(flatband voltage)同時確保元件可靠度的潛能。在元件特性上,初步結果顯示出氧化層厚度22Å的矽氧化鉿薄膜電晶體其電子移動率僅達二氧化矽的50%. 此外,亦結合高介電氧化鉿及高熱穩定度矽氧化鉿的優點,整合出具堆疊結構的電晶體並探討其特性。
  最後,針對上述元件整合高介電閘極絕緣層高臨界電壓及電子移動率衰減的缺點,吾人提出了一種新式薄膜製程方法。首先熱氧化矽基板成長出高品質的二氧化矽,再配合原子層化學氣相沈積法將氣體四氯化鉿(HfCl4)導入二氧化矽薄膜中,成為摻雜鉿(Hafnium)的二氧化矽薄膜,接著再以高溫氨氣(NH3)與氧化氮(N2O)方式除去氯雜質並形成一層高介電含鉿的氮化氧化矽(HfSiON)薄膜。結果發現,氧化層厚度18Å的電晶體不僅漏電流可降低45倍且平帶電壓沒有偏移,電子移動更可提升至90%. 而在可靠度上也呈現出絕佳的特性。
The characteristics of high-K dielectrics for ULSI applications have been investigated. Additionally, optimization of technology processes has been developed to promote the characteristics of MOS devices with the high-K materials, including (a) nitrided oxide, (b) hafnium dioxide (HfO2), (c) hafnium silicate (HfSiO), and (d) Hf-doped and NH3-nitrided thin films.

Firstly, the characteristics and scalability of the ultrathin nitrided oxide formed by rapid thermal nitridation in NH3 ambient are investigated. Through NH3 thermal nitridation, it retains the initial base oxide thickness and concurrently introduces nitrogen concentration highly as 10%, exhibiting excellent downscaling ability. However, while the equivalent oxide thickness (EOT) of the nitrided oxide is below 15Å, the gate leakage current reaches 1A/cm2, which is too large for low-power and low-leakage devices applications, thus motivating us into the era of high-K dielectrics.
Secondly, we comprehensively investigate the physical and electrical characteristics of hafnium dioxide (HfO2) formed by atomic layer chemical vapor deposition (ALCVD). The experimental results indicate that the dielectric constant of HfO2 is about 23, exhibiting dramatic reduction of gate leakage current in the magnitude of 6 to 8 orders. Additionally, process compatibility with polysilicon gate electrode is discussed and integration of HfO2 into conventionally CMOS process flow is succeeded. After process optimization of H2 and O2 post deposition annealing (PDA), polysilicon gate MOSFETs with HfO2 (EOT=23Å) exhibit degraded electron mobility (20% degradation) and almost intact hole mobility. Furthermore, factors leading to high threshold voltages in both N-type and P-type MOSFETs are investigated and a model based on interface traps at polysilicon/HfO2 interface is proposed.

Thirdly, the characteristics of hafnium silicate (HfSiO) dielectric formed by metal organic chemical vapor deposition (MOCVD) are investigated. Although the addition of silicon in HfSiO film can raise the crystallization temperature, the electrical thickness of HfSiO is increased in response since the system k-value is decreased. With NH3 thermal nitridation prior to deposition of HfSiO can effectively tune the flatband voltage close to that of conventional oxide and significantly improve the leakage properties over SiO2 (3 orders reduction). Furthermore, the excellent interface quality has been evidenced by the result of immunity against soft breakdown with NH3 nitridation. The MOSFETs with HfSiO (EOT=22Å) exhibit significantly reduced electron mobility (~50% degradation) and slightly degraded hole mobility.
Finally, in the viewpoint of reduced electron mobility and high threshold voltage described above, we propose a novel Hf-doped and NH3-nitrided high-K gate dielectric. First, we grow a high quality SiO2 by thermal oxidation of silicon substrate and then doped hafnium by ALCVD using HfCl4. Next, high temperature NH3 nitridation to remove Cl residues and concurrently introduce nitrogen to form HfSiON film. Followed by high temperature N2O annealing to stabilize the film. The HfSiON gate dielectric demonstrates excellent device performances such as only 10% degradation of electron mobility and almost 45 times of magnitude reduction in gate leakage compared to conventional SiO2 counterpart at the same equivalent oxide thickness (EOT). Additionally, negligible flatband voltage shift is achieved with this technique. Excellent performances in electrical stressing are also demonstrated by the dielectric.
Contents
Abstract (Chinese) Ⅰ
Abstract (English) Ⅲ
Acknowledgment (Chinese)Ⅵ
Contents Ⅶ
Table Caption XI
Figure Captions XII
Chapter 1
Introduction
1.1 Overview 1
1.2 Preface of this Thesis4
Chapter 2
Scale-Down Issues of Nitrided Oxide
2.1 Background and Motivation 11
2.2 Experimental 13
2.3 Physical Properties Analysis 14
2.4 Electrical Properties Analysis 15
2.4.1 EOT Reduction Behavior 16
2.4.2 EOT Reduction Model 17
2.5 Conclusions 19
Chapter 3
Preparation and Characterization of Hafnium Dioxide (HfO2) by Atomic Layer Chemical Vapor Deposition (ALCVD)
3.1 Background and Motivation 33
3.2 Experimental 35
3.2.1 Feature of ALCVD 35
3.2.2 Preparation Process for ALCVD HfO2 Film 35
3.3 Physical Properties Analysis 36
3.3.1 Physical Defects in HfO2 Film 36
3.3.2 Surface Preparation for HfO2 Deposition 37
3.3.3 Film Morphology after Post Deposition Annealing37
3.4 Electrical Properties Analysis 38
3.4.1 HfO2 Capacitor with Metal Gate Electrode 38
3.4.1.1 k-value of HfO2 Dielectric 38
3.4.1.2 Gate Leakage Current Reduction 39
3.4.1.3 Flatband Voltage and Hysteresis 39
3.4.2 Poly-Si Integration Issues 40
3.4.3 Post Deposition Annealing (PDA) Effects 42
3.4.3.1 High-Temperature H2 Annealing 42
3.4.3.2 High-Temperature Diluted Oxygen Annealing 43
3.4.4 HfO2 MOSFETs with Poly-Si Gate Electrode 44
3.5 Mechanism for Opposite Flatband Voltage Shift 45
3.6 Conclusions 47
Chapter 4
Preparation and Characterization of Hafnium Silicate by Metal Organic Chemical Vapor Deposition (MOCVD)
4.1 Using Hafnium Silicate (HfSiO) as Gate Dielectric 85
4.1.1 Experimental 86
4.1.2 X-Ray Diffraction Analysis 87
4.1.3 Electrical Properties Analysis of Hafnium Silicate (HfSiO) 87
4.1.3.1 Hafnium/Silicon Ratio Effects 87
4.1.3.2 Interface Engineering 88
4.1.3.3 HfSiO MOSFETs with Poly-Si Gate Electrode 89
4.1.4 Reliability of Hafnium Silicate (HfSiO) 90
4.1.4.1 Electrical Breakdown Field (Ebd) 90
4.1.4.2 Stress-Induced Leakage Current (SILC) 90
4.1.4.3 Time-Dependent Dielectric Breakdown (TDDB) 91
4.2 Using HfO2/HfSiO Gate Stack 92
4.2.1 Experimental 93
4.4.2 Results and Discussions 93
4.3 Conclusions 94
Chapter 5
Preparation and Characterization of a Hf-Doped and NH3-Nitrided High-K Gate Dielectric Thin Film
5.1 Introduction 115
5.2 Experimental 116
5.3 Results and Discussions 117
5.4 Conclusions 119
Chapter 6
Conclusions and Prospects
6.1 Conclusions 132
6.2 Prospects 134
Appendix
Publication List i
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