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研究生:林佳民
研究生(外文):Lin Chia Min
論文名稱:射頻CMOS功率放大器設計用於藍芽與無線區域網路系統
論文名稱(外文):RF CMOS Power Amplifier Designs for Bluetooth and WLAN Systems
指導教授:周復芳
指導教授(外文):Christina F. Jou
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電信工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:英文
論文頁數:50
中文關鍵詞:功率放大器藍芽無線區域網路
外文關鍵詞:CMOSBluetoothWLAN
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本篇論文的第一部份敘述一個適用於藍芽系統Class 1之CMOS功率放大器,利用串疊組態的功率電晶體提供高訊號擺動以增加輸出功率。輸出級的輸入端加入一個接法如二極體的電晶體線性化偏壓電路,此線性化偏壓電路提供一個與輸出級的輸入電容成反向的曲線特性用以補償輸入電容的不線性特性。模擬結果顯示此放大器的P1dB點改善了1.5 dB至2 dB且P1dB = 22 dBm、PAE = 28 %。此功率放大器使用TSMC 1P5M 0.25-um CMOS製程製作兩級增益級及線性化電路,使用印刷式電路板設計輸入及輸出的匹配網路。
本篇論文的第二部分則敘述一個適用於無線區域網路802.11a及802.11g之雙頻CMOS功率放大器,為了線性度的考量採取Class A的偏壓點。利用兩個似Diplexer形式的電路加上集總原件以設計出所需輸入及輸出端的雙頻匹配網路。模擬結果所示P1dB在2.4-GHz和5.2-GHz皆大於21 dBm、增益和功率增加效率在2.4-GHz及5.2-GHz 分別為20 dB、7 dB和24 %和18 %。

The first part of this thesis describes a CMOS Power Amplifier for Bluetooth Class1 applications using cascode configuration power transistor to provide higher signal swing. A diode-connected linearized biasing network is applied to the input of output stage; it provides an inverse input capacitance (Cin’) curve in order to compensate the nonlinear Cin of the power transistor. The simulation results show the P1dB is enhanced for 1.5dB ~ 2dB and result in P1dB = 22 dBm, PAE = 28 %. However two transistors and linearizer circuit are fabricated by using TSMC 1P5M 0.25-um CMOS process. Moreover input-matching and output-matching network are built on PCB. The
The second part of this thesis shows a dual-band CMOS power amplifier for WLAN 802.11a (5.2-GHz) and 802.11g (2.4-GHz) applications that adopt Class A biasing point for linearity consideration. Designing input and output dual-band matching networks by using two diplexer-like circuits. The simulation results show P1dB > 21 dBm at 2.4-GHz and 5.2-GHz, gain and PAE equal to 20 dB, 7 dB and 24 %, 18 % at 2.4-GHz and 5.2-GHz respectively.

TABLE OF CONTENTS
ABSTRACT (Chinese)
ABSTRACT (English) ACKNOWLEDGEMENTS
TABLE OF CONTENTS
LIST OF FIGURES
LIST OF TABLES
CHAPTER 1 INTRODUCTION
1.1 Background
1.2 Motivation
1.3 Organization of This Thesis
CHATPER 2 BASIC THEORY AND DESIGN METHODOLOGY
2.1 Class A Amplifiers
2.2 Gain Match and Power Match
2.3 Load-Line Theory
2.4 Load Pull Measurement
2.5 Two-stages Amplifier
2.6 CMOS Process
2.6.1 Active Device
2.6.2 Passive Components
CHAPTER 3 A CMOS POWER AMPLIFIER FOR BLUETOOTH CLASS 1 APPLICATION
3.1 Introduction of Bluetooth System
3.3 Selections of the Device, Bias Point and Gain Control Mechanism
3.3 Linearized Bias Network
3.4 Two-Stage Power Amplifier
3.5 Layout Considerations
3.6 Simulation Results and Measurement Considerations
CHAPTER 4 A DUAL-BAND CMOS POWER AMPLIFIER FOR WLAN APPLICATIONS
4.1 Introduction of Wireless LAN System
4.2 Device Selections
4.3 Dual-Band PA Design
4.4 Two-Stage Power Amplifier
4.5 Layout Considerations
4.6 Simulation Results and Measurement Considerations
CHAPTER 5 CONSLUSIONS AND FUTURE WORK
REFERENCES

[1]Tirdad Sowlati, et al., “A 2.4 GHz 0.18 CMOS Self-Bias Cascode Power Amplifier with 23dBm Output Power,” in ISSCC Dig., Tech. Papers, pp.465-466, Feb. 2002.
[2]F. O. Eynde, J. Schmit, V. Charlier et al. “A Full Integrated Single Chip SOC for Bluetooth,” in ISSCC Dig., Tech Papers, p.196, Feb.2001.
[3]J.C. Rudell, J.J. Ou, R. S. Narayanaswami, et al. “Recent developments in high integration multi-standard CMOS transceivers for personal communication systems,” Invited paper at the 1998 International Symposium on Low Power Electronics, 1998.
[4]M. Steyaert, M. Borremans, J. Janssens, et al. “A 900MHz/1.8GHz CMOS receiver for dual-band applications,” in In Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp.48-49. Feb. 1998.
[5]Mona M. Hella, et al, “RF CMOS Power Amplifiers,” pp.55-88, 2002.
[6]Cheng-Chi Yen, “A 0.25- 20-dBm 2.4GHz CMOS Power Amplifier with An Integrated Diode Linearizer”, IEEE Microwave and Wireless Components Letters, Vol. 13, No.2, pp.45-47, February 2003.
[7]Masoud Zargari, et al., “A 5-GHz CMOS Transceiver for IEEE 802.11a Wireless LAN systems,” in IEEE J. Solid-State Circuits, vol. 37, pp.1688-1694, Dec. 2002
[8]" RF Power Amplifier for Wireless Communications,” Steve C. Cripps, pp.24-36, 1999.
[9]“The Design of CMOS Radio Frequency Integrated Circuits,” Thomas H. Lee, p.37, 1998.
[10]Timothy C, Kuo, Bruce B. Lusignan, “A 1.5W Class-F RF Power Amplifier in 0.2 CMOS Technology,” in In Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp.154-155, 2001.
[11]T. Yoshimasu, M. Akagi, N. Tanba, and S. Hara, “An HBT MMIC power amplifier with an integrated diode Linearizer for low-voltage portable phone applications,” IEEE J. Solid-State Circuits, Vol.33, pp.1290-1296, Sept. 1998.
[12]“High-Power GaAs FET Amplifier,” John L. B. Walker, p89, 1993.
[13]R. Van Nee and R. Prasad, OFDM for Wireless Multimedia Communications. Norwell, MA: Artech House, 2000.
[14]A.Adar, et al, “A High Efficiency Single Chain GaAs MESFET MMIC Dual Band Power Amplifier for GSM/DCS Handsets,” pp.69-72, IEEE, 1998.
[15]E. Chen, et al, “ CMOS Technology for Bluetooth Power Applications,” pp.163-166, IEEE, 2000.

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