臺灣博碩士論文加值系統

隨著半導體科技不斷的改變與進步，數位電路的電源能夠一直調降，但對於類比電路而言，電源不斷的下降，電路設計卻是一個很大的挑戰。目前低電壓的類比數位轉換器多為1伏特到2伏特，若電壓太低，將無法使類比電路正常的操作。如果採用切換式放大器，將可以讓電路能夠在1伏特的電源供應下操作，藉由壓低電壓使消耗功率降低。在生物醫學應用中，電路設計必定需要考慮可植入性、低功率及高可靠度。在這些考量下，使用切換電容式電路的積分三角調變器是一個不錯的選擇。本篇論文設計了一個使用切換式放大器的低功率雙倍取樣的積分三角調變器，在輸入訊號頻寬50Hz到150Hz，能夠達到訊號對雜訊比有78dB，並且放大器功率消耗只有257nW。這裡所使用的架構是二階的積分三角調變器，主要因為它不需要考慮高階穩定度的問題，以及藉由雙倍取樣的電路設計，能夠使等效的超取樣比變成原來的兩倍，跟一般使用三階(或以上)的積分三角調變器一樣，能夠達到生物醫學訊號所需要的規格。

The thesis proposes a low power double sampling sigma-delta modulator with switched-opamp technique for a pacemaker or other biomedical application. Due to the characteristics of such an application, the proposed system presents the typical design challenges of low voltage, low power circuits. This work uses oversampling conversion techniques can be advantageous in terms of power dissipation at a given dynamic range for the narrow bandwidth typical of biological signals (50Hz-150Hz). The modulator is realized with a TSMC standard 0.35 μm CMOS technology using the switched-opamp technique. The sigma-delta modulator is a second order modulator with double sampling to make the effective oversampling ratio twice than original one. This modulator can operate at a 1V supply voltage and achieve a SNR of 78dB while the switched-opamp of the modulator dissipate 257nW.

Chapter 1 Introduction …………………………………………………1
1.1 Motivation ……………………………………………………1
1.2 Organization …………………………………………………2
Chapter 2 Background ……………………………………………………3
2.1 Quantization …………………………………………………3
2.1.1 Quantization Error ………………………………………3
2.1.2 Performance Metrics ………………………………………9
2.2 Oversampling Technique ……………………………………12
2.3 Noise-Shaped Sigma-Delta Modulator ……………………17
2.3.1 First-Order Sigma-Delta Modulator ……………………20
2.3.2 Second-Order Sigma-Delta Modulator …………………24
2.4 High-Order Sigma-Delta Modulators ………………………26
2.4.1 Single-Loop High-Order Sigma-Delta Modulators ……28
2.4.2 Multi-stage Noise-Shaping Sigma-Delta Modulator …30
Chapter 3 Design of Low-Power Sigma-Delta Modulator …………33
3.1 Trends Toward of Low-Power Low-Voltage IC …………33
3.2 System Architecture and Specifications ……………34
3.3 Low-Voltage Switched-Capacitor Techniques …………40
3.3.1 Voltage Multiplier ………………………………………43
3.3.2 Low-Threshold Voltage Process ………………………45
3.3.3 Clock Bootstrapped Switch ……………………………45
3.3.4 Low Voltage Switched-Op-amp …………………………46
Chapter 4 Implementation of 2nd-order Double Sampling Modulator ……………………………………………………………………49
4.1 Integrators of the Sigma-Delta Modulator ………49
4.1.1 Charge Transfer during Two Phases …………………49
4.1.2 Digital to Analog Converter …………………………51
4.2 Implementation of Bootstrapped Switch ……………54
4.3 Implementation of Switched-Opamp ……………………56
4.3.1 Low-Voltage Switched-Opamp ……………………………57
4.3.2 Low-Voltage Dynamic Common Mode Feedback …………59
4.3.3 Simulation Results of Switched-Opamp ………………61
4.4 Implementation of Low-Voltage Quantizer ……………63
4.5 Clock Generator ……………………………………………66
4.6 Simulation Results of Double-sampling Sigma-Delta Modulator……………………………………………………………………67
4.7 Layout, Floorplan and Post-Simulation ………………69
4.8 Test Setup ……………………………………………………78
4.8.1 Input Signal Source and Input Termination Circuit …………………………………………………………………………80
4.8.2 Power Supply and Ground ……………………………81
4.8.3 Reference Voltage Generator ………………………83
4.8.4 Clock Generator ………………………………………83
Chapter 5 Conclusions and Future Work ……………………………85
Reference …………………………………………………………………86

[1] Semiconductor Industry Association “The National Technology Roadmap for Semiconductors,” http://www.sematech.org/, 1997.
[2] L. Wu, Low-voltage 1.5-bit/stage pipeline analog-to-digital converter, M.S. thesis, Oregon State University, Jun. 1999.
[3] H. H. Chang, “The Design and Implementation of Bandpass Modulators,” M.S. thesis, National Taiwan University, Jun. 2001.
[4] J. F. Duque-Carrillo, J. L. Ausin, G. Torelli, J. M. Valverde, and M. A. Deminguez, “1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology,” IEEE J. Solid-State Circuits, Vol. 35, No. 1, Jan. 2000, pp. 33- 44.
[5] V. Peluso, P. Vancorenland, A. M. Marques, M. S. J. Steyaert, and W. Sansen, “A 900-mV Low-Power A/D Converter with 77-dB Dynamic Range,” IEEE J. Solid-State Circuits, vol. 33, no. 12, Dec. 1998, pp. 1887-1897.
[6] S. Rabii and B. A. Wooley, “A 1.8-V Digital-Audio Modulator in 0.8μ m CMOS,” IEEE J. Solid-State Circuits, Vol. 32, Jun. 1997, pp. 783-796.
[7] U. Moon, G. Temes, E. Bidari, M. Keskin, L. Wu, J. Steensgaard, and F. Maloberti, “Switched-capacitor circuit techniques in submicron low-voltage CMOS,” ICVC ’99 6th International Conference on VLSI and CAD, Oct 1999, pp. 349-358.
[8] M. Dessouky and A. Kaiser, “Very Low-Voltage Digital-Audio Modulator with 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE J. Solid- State Circuits, Vol. 36, March 2001, pp. 349-355.
[9] M. Dessouky and A. Kaiser, “Input Switch Configuration Suitable for Rail- to-Rail Operation of Switch-Opamp Circuits,” Electron. Letter., vol. 35, no. 1, 7th, January 1999, pp. 8-10.
[10] R. Schreier, and M. Snelgrove, “Bandpass Delta-Sigma Modulation,” Electronics Letters, Vol. 25, NO. 23, Nov 1989, pp.1560-1561.
[11] J. Steensgaard, “Bootstrapped Low-Voltage Analog Switches,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, May 1999, pp. 29-32.
[12] J. Crols nd M. Steyaert, “Switched-Opamp: An Approach to Realize Full CMOS Switched-Capacitor Circuits at Very Low Power Supply Voltages,” IEEE J. Solid-State Circuits, vol. 29, Aug. 1994, pp. 936-942.
[13] V. Peluso, M. S. J Steyaert and W, Sansen, “A 1.5V-100uw Sigma-Delta Modulator with 12b Dynamic Range Using the Switched-Opamp Technique.” IEEE J. Solid-State Circuits, vol. 32, Jul. 1997, pp. 943-952.
[14] V. Peluso, P. Vancorenland, A. M. Marques, M. S. J Steyaert and W, Sansen, “A 900mW Low-Power Sigma-Delta A/D Converter with 77-dB Dynamic Range, ” IEEE J. Solid-State Circuits, vol. 33, Dec. 1997, pp. 1867-1897.
[15] A. Baschirotto and R. Castello, “A 1-V 1.8-MHz CMOS Switched-Opamp SC Filter with Rail-to-Rail Output Swing,” IEEE J. Solid-State Circuits, vol. 32, no. 12, Dec. 1997, pp. 1979-1986.
[16] M. Dessouky and A. Kaiser, “Very Low-Voltage Digital-Audio Delta-Sigma Modulator with 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE J. Solid-State Circuits, vol. 36, no. 3, Mar. 2001, pp. 349-355.
[17] S. L. Cheung, “1-V Switched-Capacitor Pseudo-2-Path Filter” M.S. thesis, Hong Kong University, Aug. 1999.
[18] T. Lehmann and M. Cassia, “1-V Power Supply CMOS Cascode Amplifier,” IEEE J.Solid-State Circuits, vol. 36, no. 7, Jul. 2001, pp. 1082-1086.
[19] A. Baschirotto and R. Castello,”Low-Voltage Fully Differential Switched- Opamp Bandpass modulator.” IEEE Proc.-Circuits Devices Syst., vol. 146, no 5, Oct. 1999, pp. 249-253.
[20] Vincent S. L. Cheung, Howard Luong and Mansun Chan, “A 0.9V 0.2uW CMOS single opamp based switched opamp Sigma Delta modulator for pacemaker applications,” IEEE International Symposium on Circuits and Systems, ISCAS 2002, vol. 5, May 2002, pp. V-185 -V-188.
[21] Andrea Gerosa, Arianna Novo, Andrea Neriani, “Low-Power Sensing and Digitazation of Cardiac Signals based on Sigma-Delta Conversion,” ISLPED ''00 Proceedings of the 2000 International Symposium on Low Power Electronics and Design 2000, July 2000, pp. 216 -218.
[22] J. C. Candy and G. C. Temes, “Oversampling methods for A/D and D/A conversion,” in Oversampling Delta-Sigma Data Converters. Piscataway, NJ: IEEE Press, 1992, p. 7.
[23] D. Senderowicz, G. Nicollini, S. Pernici, A. Nagari, P. Confalonieri, and C. Dallavalle, “Low-Voltage Double-Sampled Sigma-Delta Converters,” IEEE J. Solid-State Circuits, vol. 32, Dec. 1997, pp.1907-1919.
[24] S. Rabii and B. A. Wooley, “The Design of Low-Voltage, Low-Power Sigma-Delta Modulators,” Kluwer Academic Publishers, 1999.
[25] H. H. Chang, The Design and Implementation of Bandpass Modulators, M.S. thesis, National Taiwan University, Jun. 2001.
[26] S. Rabii and B. A. Wooley, “A 1.8-V Digital-Audio Modulator in 0.8µm CMOS,” IEEE J. Solid-State Circuits, vol. 32, Jun. 1997, pp. 783-796.
[27] M. Dessouky and A. Kaiser, “Very Low-Voltage Digital-Audio Modulatorwith 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE J. Solid-State Circuits, vol. 36, March 2001, pp. 349-355.
[28] M. Dessouky and A. Kaiser, “Input Switch Configuration Suitable for Rail-to-Rail Operation of Switch-Opamp Circuits,” Electron. Letter, vol. 35, no. 1, 7th, January 1999, pp. 8-10.
[29] J. Steensgaard, “Bootstrapped Low-Voltage Analog Switches,” in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, May 1999, pp. 29-32.
[30] J. Crols nd M. Steyaert, “Switched-Opamp: An Approach to Realize FullCMOS Switched-Capacitor Circuits at Very Low Power Supply Voltages,” IEEE J. Solid-State Circuits, vol. 29, Aug. 1994, pp. 936-942.
[31] V. Peluso, M. S. J Steyaert and W, Sansen, “A 1.5V-100uw Sigma-DeltaModulator with 12b Dynamic Range Using the Switched-Opamp Technique.” IEEE J. Solid-State Circuits, vol. 32, Jul. 1997, pp. 943-952.
[32] V. Peluso, P. Vancorenland, A. M. Marques, M. S. J Steyaert and W, Sansen, “A 900mW Low-Power Sigma-Delta A/D Converter with 77-dB Dynamic Range, ” IEEE J. Solid-State Circuits, vol. 33, Dec. 1997, pp. 1867-1897.
[33] A. Baschirotto and R. Castello, “A 1-V 1.8-MHz CMOS Switched-Opamp SCFilter with Rail-to-Rail Output Swing,” IEEE J. Solid-State Circuits, Vol. 32, No. 12, Dec. 1997, pp. 1979-1986.
[34] S. L. Cheung, H. C. Luong, and W. H. Ki, “A 1-V Switched-Opamp Switched-Capacitor Pseudo-2-Path Filter,” IEEE J. Solid-State Circuits, vol. 36, Jan. 2001, pp.14-22.
[35] S. Brigati, F. Francesconi, P. Malcovati, D. Toniestto, A. Baschirotto, and F. Maloberti, “Modeling sigma-delta modulator non-idealities in SIMULINK(R),” IEEE Proc. ISCAS’99, vol.2, 1999, pp.384-387.
[36] M. Dessouky and A. Kaiser, “Very Low-Voltage Digital-Audio Delta-SigmaModulator with 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE J. Solid-State Circuits, vol. 36, no. 3, Mar. 2001, pp. 349-355.
[37] S. L. Cheung, “1-V Switched-Capacitor Pseudo-2-Path Filter” M.S. thesis, Hong Kong University, Aug. 1999.
[38] T. Lehmann and M. Cassia, “1-V Power Supply CMOS Cascode Amplifier,” IEEE J.Solid-State Circuits, Vol. 36, No. 7, Jul. 2001, pp. 1082-1086.
[39] A. Baschirotto and R. Castello,”Low-Voltage Fully Differential Switched-Opamp Bandpass modulator.” IEEE Proc.-Circuits Devices Syst., vol. 146, no 5, Oct. 1999, pp. 249-253.
[40] J. F. Duque-Carrillo, J. L. Ausin, G. Torelli, J. M. Valverde, and M. A. Deminguez, “1-V Rail-to-Rail Operational Amplifiers in Standard CMOSTechnology,” IEEE J. Solid-State Circuits, vol. 35, no. 1, Jan. 2000, pp. 33-44.
[41] V. Peluso, P. Vancorenland, A. M. Marques, M. S. J. Steyaert, and W. Sansen, “A 900-mV Low-Power A/D Converter with 77-dB Dynamic Range,” IEEEJ. Solid-State Circuits, Vol. 33, No. 12, Dec. 1998, pp. 1887-1897.
[42] S. Karthikeyan, S. Mortezapour, A. Tammineedi, and E. K. F. Lee, “Low-Voltage Analog Circuit Design Based On Biased Inverting Opamp Configuration,” IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 3, Mar. 2000, pp. 176-184.
[43] Behzad Razavi, “Design of Analog CMOS Integrated Circuits,” McGRAW-HILLInternational Edition, 2001.
[44] Tzu-Chien Hsuef, The Design and Implementation of Low-pass Multibit Delta-Sigma Modulators, M.S. thesis, National Taiwan University, Jun. 2001.