臺灣博碩士論文加值系統

由於具抗雜訊及可呈現區域性變動量之特性，低解析度的小波轉換係數遂為
圖形辨識應用中極欲取得之特徵參數。然而傳統小波轉換的運算模式係建立在金
字塔型遞迴演算法下，此模式在連續處理時存在先天性資料衝突的問題，在硬體
實現時，需以時脈交錯方式解決，不僅電路複雜且需耗時計算無用之高解析度係
數。為克服此問題，我們摒棄傳統的遞迴式運算架構，另外開發一非遞迴式小波
轉換法。然而非遞迴式演算法亦存在一先天性嚴重問題，即濾波器係數會隨著分
解階數的增加而呈級數成長。為克服此問題，我們針對非遞迴式小波轉換提出一
區段累加演算法(SAA)，以克服濾波器係數級數成長的問題。SAA 係以低於原始
濾波器長度之乘法及加法器執行平行階次分解處理，可直接求得任一解析度係
數，並可提供最短的資料寬度及資料源共享機制，以達進一步的電路精簡目的，
適合於超音波連續乳房腫瘤切面影像即時辨識系統之應用。

With the significant properties of noise resistance and local variance extractability, the
wavelet transform coefficients of coarser level are desired for the applications of pattern
recognition. However, all traditional VLSI architectures of the wavelet transform based on
the recursive pyramid algorithm require interleaving technique to solve the data confliction
problem happening at the entry. This will increase circuit complexity and time latency to
compute those useless wavelet transform coefficients in finer levels. Instead, we present a
non-recursive algorithm of the 1-D BDWT to solve this problem. The main difficulty of
the non-recursive 1-D BDWT is that the filter coefficients will be growing progressively as
k is increased. Based on the AOCA process, an efficient process called segment
accumulation algorithm (SAA) is proposed to overcome the filter growing problem. With
the property of using the same original data for all stages, data sharing technique can be
applied in the parallel processing scheme of the SAA for circuit complexity reduction. The
SAA provides four fundamental VLSI architectures with the advantages of requiring no
multiplex, less multiplier, adder, and non-interleaving process. Moreover, the latency of the
architecture is independent of the decomposition levels and can be very short.

第一章緒論……………………………………………………………..…………1
1-1 研究動機……………………………………………………………………1
1-2 硬體架構回顧………………………………………………………………4
1-3 論文內容概述………………………………………………………………5
第二章一維雙正交離散小波轉換之理論…………..……………………………6
2-1 一維離散週期性小波轉換理論………………..……………………………6
2-2 一維雙正交離散小波轉換理論……………………………………………10
第三章基於區段累加演算法之非遞迴式一維雙正交離散小波轉換…………17
3-1 非遞迴式一維雙正交離散小波轉換演算法………………………………17
3-2 邊界資料處理方式一………………………………………………………28
3-2-1 邊界資料處理方式一的非遞迴式1-D BDWT 轉換係數……………28
3-2-2 邊界資料處理方式一的額外取樣資料………………………………30
3-3 邊界資料處理方式二………………………………………………………35
3-3-1 非遞迴式1-D BDWT 係數和遞迴式1-D BDWT 係數的差異…...…35
3-3-2 後邊界資料係數的濾波器係數……………………..…………..……39
3-3-3 前邊界資料係數的濾波器係數………………………..………..……43
3-3-4 邊界資料處理方式二的軟體模擬結果……………..…………..……47
第四章非遞迴式1-D BDWT 之VLSI 硬體架構……………………….……….49
4-1 邊界資料處理方式一的資料結構…………………………………………49
4-2 邊界資料處理方式一的硬體架構圖………………………………………56
4-3 邊界資料處理方式二的資料結構…………………………………………60
4-4 邊界資料處理方式二的硬體架構圖………………………………………63
第五章非遞迴式一維雙正交離散小波轉換之電路模擬………………..……68
5-1 邊界資料處理方式一之電路模擬…………………………..………..……68
5-2 邊界資料處理方式二之電路模擬…………………………..………..……76
第六章結論………………………………………………………………..……95
Reference…………………………………………………………………………96

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