臺灣博碩士論文加值系統

隨著無線通訊的快速發展，其對射頻電路的特性要求，也隨之越來越嚴格，在這當中，壓控振盪器在一直都扮演著相當中要的角色，以低中頻式接收器（Low-IF Receivers or Wide Band IF Receivers）而言，通常採用正交降頻的方法，將射頻訊號通過I、Q兩個正交路徑進行混波，使鏡像頻道的頻譜在兩個路徑上互為反相，再將兩個訊號相加，來達到鏡像頻道移除，當中的本地振盪源信號是由壓控振盪器來提供，也因為需要的是I、Q兩個正交的信號，若本地振盪源信號本身就可以同時產生I、Q兩個正交信號，就不需要使用正交信號產生器(quadrature generator)。在壓控振盪器中，相位雜訊則是當中要求最嚴格的一項參數，也為了達到低相位雜訊的表現，所以我們採用LC tank的電路架構，在本論文當中我們會首先討論基本壓控振盪器的原理及其所需要考量的各項參數，再來是針對壓控振盪器當中雜訊的來源作一討論以及舉例如何從電路架構上來獲得較佳的相位雜訊表現，並瞭解在LC tank的壓控振盪器中電感的選用上，應該有那些考量，對不同作法的電感應該如何決定其適用性等，再來則是介紹四相輸出的一個特殊定理和改進，並討論我們針對以上的考量以及要求四相的輸出之情況下所設計的電路，最後有量測和模擬之比較及討論。
本次送件的主要目的是利用SiGe 0.35um 3P3M 製程來實現2.4GHz頻帶的本地振盪器並量測其特性。除可調頻率及相位雜訊的考量外，所設計的要點為四相輸出加相位移電路。
本文之電路是用SiGe元件來設計，主要是為了降低相位雜訊，和減少電流的消耗。而四相輸出不但在系統的鏡像雜訊的消除有很大的幫助外，在低電感Q值下也因可加入相位移電路而達到很好的相位雜訊。振盪器最後模擬，相位雜訊有-117dBc/Hz，輸出功率有-23dBm，可調頻率約2.15GHz~2.65GHz，Kvco為200MHz/V。量測的相位雜訊有-109dBc/Hz，輸出功率有-22dBm，可調頻率約2.25Hz~2.75GHz，Kvco為220MHz/V。

For realizing lower power consumption and phase noise immunity from added quadrature phase shifter 2.4GHz voltage control oscillator (vco) design is the major goal with 0.35um SiGe 3P3M process. The quadrature phase type is helpful to system image rejection and enhances phase noise performance in poor quality factor (Q) application. Simulation of the two-stage quadrature LC oscillator reveals phase noise -117dBc/Hz、Output power -23dBm、tuneable frequency 2.15GHz ~ 2.65GHz and Kvco 200MHz/V. Measurements shows the phase noise around -109dBc/Hz、Output power -22dBm、tuneable frequency 2.25GHz ~ 2.75GHz and Kvco 220MHz/V.

目次
第一章、簡介 1
1.1 序論 1
1.2 論文綱要 2
第二章、接收器架構與振盪器之規格 3
2.1簡介 3
2.2接收器架構 3
2.2.1超外差接收器 4
2.2.2直接降頻接收器 7
2.2.3鏡像消除接收器 9
2.3振盪器相位雜訊規格之定定 10
第三章、壓控振盪器設計考量 13
3.1振盪器原理 13
3.1.1 LC Tank壓控振盪器 14
3.2壓控振盪器的性能參數考量 14
3.3相位雜訊 15
3.3.1相位雜訊在射頻通訊上的影響 16
3.3.2相位雜訊機制 17
第四章、 LC壓控振盪器的架構及雜訊來源 24
4.1 LC壓控振盪器架構 24
4.1.1 MOSFET 壓控振盪器 24
4.1.2 BJT 壓控振盪器 31
4.2 LC壓控振盪器設計流程 33
4.3 LC壓控振盪器電感選取 34
第五章、四相LC壓控振盪器和相位移電路設計 39
5.1為何要四相輸出的壓控振盪器 39
5.2四相壓控振盪器原理 40
5.3四相壓控振盪使用相位移電路的理論 41
5.4理論的最佳和模擬比較 41
5.5四相壓控振盪器加相位移電路設計 44
5.6模擬結果和比較 48
第六章、量測結果與分析 52
6.1晶片佈局(layout) 、 Die Photo和PCB板之佈局(layout)52
6.2量測環境 54
6.3量測結果與比較 55
6.3.1輸出阻抗匹配 55
6.3.2輸出頻譜 56
6.3.3相位雜訊 57
6.3.4可調頻率範圍 58
6.3.5總結比較 61
第七章、結論 62
參考文獻 63

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