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研究生:林琮閔
論文名稱:金氧半與快閃記憶體元件氧化層電荷及界面陷阱之量測研究
論文名稱(外文):Measurement of oxide charge and interface trap for MOSFET,s and flash cells
指導教授:張廖貴術
學位類別:碩士
校院名稱:國立清華大學
系所名稱:工程與系統科學系
學門:工程學門
學類:核子工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:中文
論文頁數:127
中文關鍵詞:電荷汲引電流技術氧化層電荷界面陷阱
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由於金氧半與快閃記憶體元件等,其工作原理皆是倚賴熱載子的傳輸來達成目的,因為熱載子會對元件造成很大的傷害,為了能夠有效的量測評估熱載子損害,我們根據電荷汲引技術發展一套直接萃取氧化層電荷和界面陷阱的側向分佈。由於此方法不需要複雜的數值運算,已經成為現在研究熱載子傷害最好的測量工具之一。另外也針對氧化層補陷的電荷有著不同極性考量,研發出改良式的電荷汲引電流技術,用來量測氧化層負電荷的分佈。也以不同的量測方式,來分別對所得到的結果做驗證。除了熱載子效應之外,輻射傷害也是個很重要的議題,針對輻射所引發的不飽合最大電荷汲引電流,在成功的抑制下,也增加電荷汲引技術的效能,使其能運用的範圍更加廣泛。隨著元件的縮小化,試著改變電荷汲引量測方式,並且以施加電應力來討論當深次微米元件遭受熱載子損害時的傷害分佈情形。
在論文最後,我們選取金氧半電晶體(MOSFET),來進行輻射總劑量測試以及低劑量率測試,作為太空元件抗輻射的評估。

摘要
誌謝
目錄
圖目錄
表目錄
第一章 序論
第二章 元件量測損傷方式與快閃記憶體的基本原理
2.1簡述熱載子損傷
2.2各式量測損傷技術
2.3快閃記憶體的操作機制
2.4影響快閃記憶體可靠性的因素
2.5結論
第三章 量測氧化層電荷與界面陷阱之空間分佈技術
3.1電荷汲引技術
3.1.1電荷汲引量測裝置與設定
3.1.2比較不同寫入操作後的可靠度
3.2電荷汲引技術應用在深次微米元件
3.2.1利用不規則增加之電荷汲引電流觀察反向短通道效應
3.2.2通道熱載子(IB,max stress)所衍生的損傷分佈
3.3輻射損害側向分佈的萃取
3.3.1輻射對金氧半電晶體的效應
3.3.2電流汲引曲線修正
3.3.3實驗結果與討論
3.4 結論
第四章 改善電荷汲引技術以量側氧化層負電荷分佈
4.1早期的方法回顧
4.2側向氧化層負電荷分佈量測技術
4.2.1電荷汲引技術的改良
4.2.2界面陷阱與氧化層電荷的萃取
4.2.3通道熱載子(IG,max stress)所衍生之損害對時間的關係
4.2.4電荷汲引量測與次起始特性量測的比較
4.3寫入操作所衍生之傷害分佈
4.3.1通道熱載子寫入所衍生之損傷側向分佈的萃取
4.3.2 F-N穿遂寫入所衍生之損傷側向分佈的萃取
4.3.3通道熱載子寫入與FN穿遂寫入的比較
4.4 結論
第五章 太空元件之抗輻射評估
5.1實驗目的
5.2實驗方法與程序
5.3實驗結果與討論
5.3.1金氧半電晶體之總劑量效應測試
5.3.2金氧半電晶體之劑量率效應測試
5.4 結論
第六章 結論
參考文獻

參考文獻
[1] T. P. Ma and P. V. Dressendorfer, “Ionizing Radiation Effects in MOS Devices and Circuits,” John Wiley & Sons,1989.
[2] E. H. Nicollian and J. R. Brews, “MOS Physics and Technology,” John Wiley & Sons, 1982.
[3] K. F. Schuegraf and C. Hu, “Hole Injection SiO2 Breakdown Model for Very Low Voltage Lifetime Extrapolation,” IEEE Transactions on Electron Devices, Vol.41, May 1994, p.761.
[4] K. R. Hoffman, C. Werner, and G. Dorda, “Hot- Electron and Hole-Emission Effects in Short N-Channel MOSFET’s,” IEEE Transactions on Electron Devices, Vol.32, 1985, p.691.
[5] P. Heremans, R. Bellens, G. Groeseneken, and H. E. Maes, “Consistent Model for the Hot-Carrier Degradation in N-Channel and P-Channel MOSFET’s,” IEEE Transactions on Electron Devices, Vol.35, 1998, p.2194.
[6] P. J. McWhorter, P. S. Winokur, “Simple Technique for Separating the Effects of Interface Traps and Trapped Oxide Charge in Metal-Oxide-Semiconductor Transistor,” Applied Physics Letters, January 1986, p.133.
[7] Dieter K. Schroder, “Semiconductor Material and Devices Characterization,” John Wiley & Sons,1998.
[8] K. T. San, and T. P. Ma, ”Determination of Trapped Oxide Charge in Flash EPROM’s and MOSFET’s with Thin Oxides,” IEEE Electron Device Letters, Vol.13, August 1992, p.439.
[9] R. E. Shimer, J. M. Caywood, and B. L. Euzent, ”Data retention in EPROMs,” IEEE-IRPS, April 1980, pages 238-243.
[10] Neal R. Mielke, “New EPROM data-loss mechanisms,” IEEE-IRPS, April 1983, pages 106-113.
[11] G. Verma, N. Mielke, “Reliability performance of ETOX based flash memories,” IEEE-IRPS, April 1988, page 158.
[12] T. C. Ong, A. Fazio, N. Mielke, S. Pan, N. Righos, G. Atwood, and S. Lai, ”Erratic erase in ETOXTM flash memory array,” IEEE — VLSI Symposium, 1993, pages 83-84.
[13] T. C. Ong, A. Fazio, N. Mielke, S. Pan, G. Atwood, S. Lai, “Instability of erase threshold voltage in ETOXTM flash memory array,” SRC Topical Research Conference on Floating Gate Non-Volatile Memory Research , Berkeley, October 1-2 1992.
[14] S. Lai, “Oxide/Silicon interface effects in EEPROMs and ETOXTM flash,” SRC Topical Research Conference on Floating Gate Non-Volatile Memory Research , Berkeley , October 1-2 1992.
[15] S. S. Chung, S. M. Cheng, G. H. Lee and J. C. Guo, “Direct Observation of the Lateral Nonuniform Channel Doping Profile in Submicron MOSFET’s from an Anomalous Charge Pumping Measurement Results,” IEEE-VLSISymposium,
1995,pages 103-104.
[16] S. S. Chung, S. J. Chen, T. S. Chao,“An Accurate Hot Carrier Reliability Monitor for Deep-submicron Shallow S/D Junction Thin Gate Oxide n-MOSFET’s,” IEEE Annual International Reliability Physics Symposium,1999,pages 249-252.
[17] T. P. Ma, and Paul V. Dressandorier, “Ionizing Radiation Effects in MOS Devices and Circuits,” John Wiley & Sons,1989.
[18] 盧俊源, “ 金氧半電晶體氧化層電荷與界面陷阱量測研究, ” 國立清華大學碩士論文.
[19] S. Dasgupta and P. Chakrabarti, “Effect of ionizing radiation on the characteristics of a MOSFET,”IEE Proc.-Circuits Devices Syst.,Vol.147, No. 2, Arpil 2000.
[20] Yujun Li and T. P. Ma, “Suppression of Geometric Component of Charge Pumping Current in SOI/MOSFETs,” VLSI Technology, Systems, and Applications, 1995. Proceedings of
[21] Technical Papers., 1995 International Symposium on , 31 May-2
[22] June 1995 Page(s): 144 -148
[23] Wenliang Chen, Artur Balasinski, and T. P. Ma, “Lateral Distribution of Radiation-Induce Damage in MOSFET’s,” IEEE Transactions on Electron Devices, Vol.40, January 1993, pages 1124-1129.
[24] S. S. Chung, S. J. Chen, and C. K. Yang, “A Novel and Direct Determination of the Interface Traps in Sub-100nm CMOS Devices with Direct Tunneling Regime(12~16A) Gate Oxide,” IEEE-VLSI Symposium, 2002 ,pages 74-75.
[25] Boualem Djezzar, “What are These Border Traps:Introduced by Radiation and Seen by Charge Pumping Technique,” IEEE Transactions on Nuclear Science, 2002, pages 234-239.
[26] M. G. Ancona, N.S. Saks, and D. McCarthy, “Lateral distribution of hot-carrier-induced interface traps in MOSFET’s,”IEEE Transactions on Electron Devices, Vol.35, December 1988, p.2221.
[27] W. Chen, and T. P. Ma ,”Channel-Hot-Carrier Induce Oxide Charge Trapping,”IEDM 1991,p731.
[28] MIL-STD-883E Method 1019.4.
[29] W. C. Jenkins and R. L. Martin, “A comparison of methods for simulating low dose-rate gamma ray testing of MOS devices,” IEEE Transactions on Nuclear Science, Vol. Ns-38, 1991, p.1560.
[30] P. S. Winokur, F. W. Sexton, J. R. Schwank, D. M. Fleetwood, P. V. Dressendorfer, T. F. Wrobel, and D. C. Turpin, “Total-Dose Radiation and Annealing Studies : Implications for Hardness Assurance Testing,” IEEE Transactions on Nuclear Science, Ns-33, December 1986, p.1343.
[31] W. C. Jenkins and R.L. Martin, IEEE Trans. Nucl. Sci., Ns-38, 1560(1991).
[32] P. S. Winokur et al, IEEE Trans. Nucl. Sci., Ns-33, 1343(1986).

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