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研究生:張致良
研究生(外文):Chih-Liang, Chang
論文名稱:減少即時系統中動態電壓排程的轉換耗損
論文名稱(外文):Reducing the power transition overhead of hard real time DVS system
指導教授:王勝德王勝德引用關係
指導教授(外文):Sheng-De Wang
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電機工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:英文
論文頁數:60
中文關鍵詞:電源管理即時系統能量耗損
外文關鍵詞:Power ManagementReal Time SystemsEnergy Consumption
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動態電壓調節技術(Dynamic Voltage Scaling)是OS視工作量的需要,對CPU的電壓與頻率做即時計算與調節的一種省電技術。 目前此項技術已經廣範的運用在各種省電設計當中,尤其是在即時系統方面的運用。 過去討論這方面的研究主要是建立一個理想化的模型,忽略所有電壓與頻率調節時的條件參數。但是在現實世界中這樣理想化的模型是無法實現的,因為有其物理上的反應與限制。在即時系統中若是沒有考慮這些轉換的因素,會產生兩種影響:
1. 時間的延遲或耗損, 導致即時性的破壞。
2. 能量的耗損。
在本論文中除了討論這些調節所需的參數之外。並提出演算法將轉換過程的能量損耗最多可以降低到原來的30%,並且不會損及即時性。

DVS (Dynamic Voltage Scaling) is a power-saving technique to calculate and adjust the voltage and frequency at run time, according to the workload requirement of OS. Recently, this technique has widely applied in many kinds of power-saving design, especially in real time system field. In the past time, the primary research of this issue is building an ideal model, ignoring all the conditional parameters of adjusting the voltage and frequency. But this ideal model is impossible to realize in the real world, due to the physical limitations and reactions. If not considering these transform factors in real time systems, it would have two influences:
1. The latency causes the real time damage.
2. The Energy overhead.
In this paper, we will discuss these required elements of power transition. In additional, we also propose an algorithm that can reduce the power transition overhead up to 30% of the original one at most, and it will not damage the real time property.

目錄 V
表列 VIII
圖列 IX
第一章 緒論 1
1.1 動機 1
1.2 CPU的省電模式 3
1.3 DVS技術 3
1.3.1 Intra-Task DVS 4
1.3.2 Inter-Task DVS 5
1.3.2 Slack評沽的方法 6
1.4 相關研究 6
1.5 問題描述 7
1.6 研究目的與方法 8
1.7 論文內容概述 9
第二章 關於DVS (DYNAMIC VOLTAGE SCALING) 10
2.1 DVS電壓排程 10
2.2 即時系統的排程設計 11
2.3 靜態電壓排程 11
2.4 動態電壓排程 14
2.4.1 空閒時間(slacks) 14
2.5 電壓調節點 16
第三章 即時系統的工作模式 18
3.1 討論即時性模式 18
3.2 控制流程 19
3.3 週期性工作模式 19
3.4 耗電模型 20
第四章 電壓排程的耗損 22
4.1 時間的耗損 23
4.2 能量耗損 24
4.3 電壓調整策略 26
4.3.1 Miss-deadline 26
4.3.2 slacks和idle的利用與搜集 31
4.3.3 演算法 35
第五章 實驗 36
5.1 模擬平台的參數 36
5.2 測試樣本 37
5.3 模擬程式 38
5.4 模擬計劃 40
第六章 分 析與討論 42
第七章 結論 48
參考文獻 49

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