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研究生:施政銘
研究生(外文):Cheng-Ming Shih
論文名稱:UHF接收機系統之晶片研製
論文名稱(外文):Chip Implementation of UHF Receiver System
指導教授:李揚漢李揚漢引用關係
指導教授(外文):Yang-Han Lee
學位類別:碩士
校院名稱:淡江大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:中文
論文頁數:61
中文關鍵詞:超高頻轉導-電容開關電容式濾波器自動微調電路低雜訊放大器混波器可變增益放大器自動增益控制
外文關鍵詞:UHFGm-CSC filterAuto-Tuning CircuitLNAMixerVGAAGC
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隨著無線通訊的蓬勃發展,無線通訊晶片的需求也與日遽增。以往的射頻晶片主要是GaAs 及 Bipolar的製程,雖然這兩種製程在高頻有較好的特性,但是無法與CMOS的基頻電路整合為一個單晶片的系統,因此CMOS射頻電路開始受到廣大的重視。
本論文試以UMC 0.5um 2P3M製程來實現一規格為315 MHz射頻信號輸入、資料傳輸速率 2.4 Kbps 之ASK UHF接收器整合晶片。且在本設計中將不使用任何晶片電感、外接濾波器元件。
本論文共分為五章。第一章簡介接收器晶片設計動機、設計流程。第二章介紹有關射頻的基本理論、接收機的架構。以利於了解一些重要的基本原理、參數對射頻電路、接收器的影響。第三章為敘述在此接收器設計中的一些設計考量、所提出之接收器架構以及部分子電路的設計、分析,其中包括子電路之模擬、量測結果。第四章介紹此UHF接收器之整合模擬與量測結果。其中UHF接收器之模擬分為前端電路、中頻電路、整合模擬三個部分。而UHF接收器之量測分為晶片量測、無線通訊系統之應用量測。第五章則為結論。
所設計之接收器晶片可應用於一般消費性電子通訊器材,如保安系統、車用警鈐系統以及遠端射頻身分確認……等等。
Due to the development of the wireless communication, the demand of the RF IC is growing rapidly. The RF circuits are usually implemented in GaAs and Bipolar process. However, these processes are not compatible to the typical CMOS process, which is used to implement the baseband circuits. Thus, if the CMOS RF circuits can be realized, the whole receiving circuits can be integrated into a single chip, and then the cost will be cut down significantly.
In this thesis, we try to implement a monolithic Ultra-High Frequency ASK receiver using UMC 0.5um 2P3M process, with 315-MHz RF input, 2.4 Kbps data rate. This receiver reduce the on chip inductor and discrete component requirement.
The thesis include five chapters:
In Chapter 1, we introduce the design motivation and design flow.
In Chapter 2, we discuss some RF fundamental and receiver architecture. In order to, Let us understand the effect of some important fundamental in the RF circuit and receiver system.
In Chapter 3, we discuss some consideration of this design、the proposed receiver architecture and analysis the subcircuit of UHF receiver. The simulation and measurement result are included.
In Chapter 4, the simulation and measurement of whole UHF receiver. the simulation result separate into three parts: front-end、intermediate-frequency stage and whole UHF receiver. The measurement result separate into two parts: Chip measurement and wireless communication system link testing.
In Chapter 5 , the conclusion The proposed receiver can be applied to common consumer electronics and wireless applications such as security system, car alarm and long-range RF ID and so on.
第一章 緒 論
1.1 研究動機
1.2 晶片設計流程
1.3 本論文之結構
第二章 射頻電路之基本概念
2.1 簡介
2.2 重要的射頻電路原理
2.2.1 線性度
2.2.2 交互調變失真
2.2.3 雜訊指數
2.2.4 靈敏度
2.2.5 動態範圍
2.3 接收器的基本架構
2.3.1 超外差接收器
2.3.2 直接降頻接收器
2.3.3 低中頻接收器
2.3.4 鏡像消除接收器
第三章 設計考量與電路設計
3.1 簡介
3.2 UHF接收器的設計考量
3.2.1 積體化之濾波器和自動微調電路
3.2.2 接收器系統之交流和直流的特性
3.3 所提出的UHF接收器之架構
3.4 低雜訊放大器之電路設計
3.4.1 低雜訊放大器之基本原理
3.4.2 所採用之低雜訊放大器的架構
3.4.3 模擬結果
3.4.4 量測結果
3.5 降頻混波器之電路設計
3.5.1 混波器之基本原理
3.5.2 混波器電路分析
3.5.2 所採用的降頻混波器
3.5.3 模擬結果
3.5.4 量測結果
第四章 UHF接收器之整合模擬與量測
4.1 簡介
4.2 UHF接收器之整合模擬
4.2.1 前端電路之整合模擬
4.2.2 中頻電路之整合模擬
4.2.3 UHF接收器系統之整合模擬
4.2.4 UHF接收器的增益估算
4.3 UHF接收器之量測結果
第五章 結 論
參考目錄 59
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