臺灣博碩士論文加值系統

由於渦輪碼有接近夏農極限的優越特性，因此它已成為第三代行動通訊標準而且受到廣泛的討論。然而由於其解碼過程中的延遲時間很長，因此渦輪碼不適用於即時語音通訊。1996年時，Benedetto等人提出一個可大幅降低解碼延遲時間卻只犧牲些許解碼效能的演算法。這個演算法是由Log-MAP演算法改變而成，配合使用滑動視窗及查表。本文針對這個演算法提出一種低複雜度的VLSI電路設計。由於這是管線式架構的設計，因此這個渦輪碼解碼器的速度非常的快。

Turbo code has become 3G standard and been widely discussed because of its outstanding performance close to the Shannon Limit, however the latency during decoding process is very long. Therefore, turbo code is not suitable for real-time voice communication. In 1996, Benedetto et al. proposed an algorithm which can significantly reduce the decoding latency with slightly sacrificing the decoding performance. The algorithm is modified from the log-MAP algorithm by using a sliding window in coordination with look-up table. In this thesis, we design a low-complexity VLSI circuit architecture for decoding turbo codes based on the algorithm. Finally, with the VLSI architecture, a turbo decoder can be very fast since it is designed as a pipeline structure.

CHAPTER I Introduction 1
CHAPTER II Introduction to Turbo Codes 3
2.1 Turbo Encoder 3
2.2 Turbo Decoder 4
CHAPTER III The MAP Algorithm, the Max-Log-MAP Algorithm, and the Log-MAP Algorithm 8
3.1 The MAP Algorithm 9
3.2 The Max-Log-MAP Algorithm 15
3.3 The Log-MAP Algorithm 21
3.4 The Log-MAP Algorithm Flowchart 25
CHAPTER IV The SW-Log-MAP Algorithm 27
4.1 Mathematical Description of the SW-Log-MAP Algorithm 28
4.2 Example of the SW-Log-MAP Algorithm: (2,1,2) RSC code 31
4.3 The SW-Log-MAP Algorithm Flowchart 36
4.4 The SW-Log-MAP Algorithm Simulation Results 38
CHAPTER V VLSI Architecture of Turbo Decoder based on the SW-Log-MAP Algorithm 43
5.1 Main Ideas of the VLSI Architecture 44
5.2 Branch Metric Calculation Unit 52
5.3 Forward Metric Calculation Unit 53
5.4 Backward Metric Calculation Unit 55
5.5 Metric Normalizing Circuit ( MNC ) Unit 58
CHAPTER Ⅵ Advantages of the VLSI Architecture 61
CHAPTER Ⅶ Simulation Results of the VLSI Circuit Architecture 63
CHAPTER Ⅷ Conclusions 64
APPENDIX 65
REFERENCES 76

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