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研究生:何志宏
研究生(外文):Zu-Hon Ho
論文名稱:雙井結構功率電晶體之設計
論文名稱(外文):A Power Transistors Structure with Dual-well Design
指導教授:簡鳳佐簡鳳佐引用關係
指導教授(外文):Feng-Tso Chien
學位類別:碩士
校院名稱:逢甲大學
系所名稱:電子工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:中文
論文頁數:73
中文關鍵詞:功率電晶體雙井結構
外文關鍵詞:Power TransistorsDual-well
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雙井結構功率電晶體之設計
學生:何志宏 指導教授:簡鳳佐博士

逢甲大學
電子工程學系 電子研究所碩士班

摘要

在現今生活中,功率金氧半電晶體(Power MOSFET)的應用非常廣泛,諸如電源供應器、顯示驅動電路、及汽車電子等;因此,對於其在操作時可能受到之高應力(High stress)環境下之可靠性研究,日顯重要。由於製程技術進步,金氧半電晶體(MOSFET’s)可以擁有不錯的導通時電流成載及關閉時耐壓的能力。這些能力的提升主要是透過雙擴散技術的運用以得到較短的有效通道以及在通道與汲極之間引入一個低濃度的漂移區,此漂移區將支撐大部分的跨壓。
本論文將針對功率金氧半電晶體之1.導通電阻值特性(On state resistance characteristics):為了降低元件熱散逸消耗,所以我們使用的元件的導通電阻值必需降低,2.崩潰能力(Breakdown capability):我們必須設計出適當的元件崩潰條件,使崩潰發生在我們所希望的地方,才不至於傷害到元件的通道使元件壽命下降,及3.雪崩能力(Avalanche capability):當元件負載端為電感性負載時,當元件關掉的時候會面臨極大的應力挑戰,於是我們必須設計出能夠對抗這種高應力的元件主體,此部分我們作深入之探討,並建立其相關之測試環境電路。
雙井結構功率金氧半場效電晶體就是被設計來克服高應力、降低導通電阻值及改善body diode recovery characteristics。我們使用ISE全模擬器來開發元件。雙井結構功率金氧半場效電晶體能重新定義元件崩潰點的位置以及減少寄生雙載子電晶體的效應的觸發,進而改善了元件的耐雪崩特性提高元件的安全操作範圍。藉著適當調整複晶矽閘及長度以及雙井的植入和驅入技術能有效降低寄生接面場效電晶體效應,進而降低元件的導通電阻值。
A Power Transistors Structure with Dual-well Design
Student: Zu-Hon Ho Advisor: Dr. Feng-Tso Chien

Institute of Electronics
Department of Electronics Engineering
Feng Chia University

Abstract

Nowadays, Power MOSFETs have been used widely very much, such as power supply, monitor driver circuit and car electronics, etc. Thus, study on the reliability of these devices under high stress conditions is more and more important. Due to the advancement in processing technology, MOSFET’s (Metal-Oxide-Semiconductor Field Effect Transistors) have been progressively improved to have appreciable on-state current-carrying and off-state voltage-blocking capabilities. These capabilities have increased primarily through the use of double-diffusion techniques to get short active channels. In the vertical double-diffused MOSFET (VDMOS), a lightly doped drift region between the channel and the drain contact, could support a large applied voltage. To characterize the ‘ruggedness’ and optimize the design for better reliability under high stress conditions, comprehensive studies on the on state resistance characteristics, breakdown capability and avalanche capability of power MOSFETs are investigated in this thesis. This test circuits for the various measurements in our experiments have been built up.
An improved Power MOSFETs device with dual-well has been proposed and discussed which have high ruggedness, low on-resistance, and improved body diode reverse recovery characteristics. Using a full-simulation simulator ‘ISE’ to develop the device has been presented. Dual-well with a heavy P+ region design can relocate the breakdown point as well as decrease the bipolar effect, and therefore improve device avalanche breakdown characteristics. The gate-poly length with proper dual-well implantation and drive-in technology can reduce JFET effect, and the specific on-resistance of power transistors can be reduced.
目錄

中文摘要 A
英文摘要 C
誌謝 E
目錄 F
表目錄 I
圖目錄 J

第一章 緒論
1.1 發展過程 1
1.2 導通電阻之研究 3
1.3 電晶體最佳化之設計 5
1.4 電晶體特性之研究 8
1.5 雪崩特性 9
1.6 研究動機 9
1.7 大綱 10

第二章 功率金氧半電晶體的製程
2.1 製程流程 18
2.2 實驗設計目的 18

第三章 元件直流特性
3.1 元件結構 31
3.2 元件工作原理 32
3-3 靜態量測環境架設 37
3-4 結果與討論 37

第四章 雪崩特性
4.1 研究動機 47
4.2 雪崩特性
4.2.1 雪崩特性理論 47
4.2.2 實驗方法 51
4.2.3 量測結果 54
4.3 體二極體反向恢復暫態特性
4.3.1 工作原理 55
4.3.2 測試環境的架設 56
4.3.3 量測結果與討論 56
第五章 結論 70
參考文獻 71
參考文獻

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