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研究生:林慶鈞
研究生(外文):Chin-Chun Lin
論文名稱:適用於調頻廣播之前端接收電路
論文名稱(外文):A CMOS FM Broadcast Receiver Front-End IC
指導教授:郭泰豪
指導教授(外文):Tai-Haur Kuo
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:英文
論文頁數:79
中文關鍵詞:互補金氧半導體調頻接收機廣波
外文關鍵詞:broadcastCMOSFMreceiver
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  本論文描述一個應用於調頻廣播系統,接收頻率在88~108 MHz之間的單一互補金氧半導體接收器晶片。為了實現單一積體化,我們採用了Low-IF的接收機架構以降低類似晶片外映像拒斥濾波器(off-chip image-reject filter)的使用,且在此同時,也可以避免類似直接降頻接收器所導致的直流偏差(DC-offset)和自我混波(self-mixing)問題。此互補金氧半導體調頻廣播接收器前端電路採用quadrature low-IF的架構,主要包含:首先是雙端輸入低雜訊放大器;接著的是Hartley架構的映像拒斥混波電路,其中有 I/Q主動式移頻混波器、二階低通濾波器、相位延遲器;最後是切換電容式的十階帶通濾波器。在這裡,接收的前端電路,可以使得高頻的輸入訊號,降頻至中頻頻率在225 kHz的同相位以及相位差90�囿漱分W訊號。透過映像拒斥混波電路提高在映像拒斥的能力。

  本接收器電路是採用0.18微米單多晶層六金屬層之混合訊號製程來設計,結果顯示當高頻的輸入訊號操作頻率在88~108 MHz之間,訊號的頻寬為200kHz,最大訊號對雜訊和失真比(PSNDR)為44.3 dB,最大訊號對雜訊比(PSNR)為45.3 dB,動態範圍(dynamic range)為70dB。當工作電壓操作在1.8伏特時,此接收電路的消耗功率為63毫瓦,晶片總面積為0.93mm�e1mm其中不含Pads之面積為0.57mm�e0.62mm。
  This thesis describes a single-chip CMOS receiver for FM Stereo Radio system working in the 88~108-MHz range. Low-power single-cell fully-featured radio receivers, with a minimum of external components are hard to find. For a monolithic implementation, the use of the Low-IF architecture alleviates the necessity of off-chip components, used for image-reject passive filtering. At the same time, DC-offset and self-mixing problems arising from direction-conversion architecture are avoided. This CMOS FM receiver frond-end is a quadrature low-IF receiver consisting of a differential-ended low noise amplifier (LNA) connected to Hartley image-rejection mixer, which comprises Inphase/Quadrature interference mixers, second-order filters, and phase shifter, followed by tenth-order switched-capacitor bandpass filter. The frond-end converts the RF signal to differential I and Q signals, centered at 225-kHz. Degrading of image interference characteristic can be avoided by I/Q IF mixers and phase shift network.
  The receiver fabricated in a 0.18μm 1P6M mixed-signal CMOS mixed-mode process, achieve peak SNDR of 44.3 dB, peak SNR of 45.3 dB and dynamic range of 70dB with signal frequency of 88~108 MHz and signal bandwidth of 200 kHz. The combination draws 63 mW from a 1.8-V supply. The total chip area including bonding pads is 0.93mm�e1mm where the active area is 0.57mm�e0.62mm.
Chapter 1 Introduction 1
1.1 Background ........................................................ 1
1.2 Motivation ........................................................ 2
1.3 Organization ...................................................... 3

Chapter 2 System Description and Architectures Design 4
2.1 Overview FM Receiver Technology ................................... 4
2.2.1 Integrated Receiver Circuits ................................. 5
2.2.2 Integrated Bandpass Filters Circuits ......................... 9
2.2 Alternative Receiver Architectures ................................ 11
2.2.1 Homodyne Receiver ............................................ 12
2.2.2 Super-Heterodyne Receiver .................................... 13
2.2.3 Low-IF Receiver .............................................. 14
2.2.4 Image-Reject Receiver ........................................ 16
2.3 Summary ........................................................... 17

Chapter 3 Design and Implementation of FM Receiver Front-End 19
3.1 FM Receiver Architecture .......................................... 19
3.2 Low Noise Amplifier Circuit Design ................................ 21
3.2.1 High Frequency Noise Model ................................... 22
3.2.2 Basic CMOS LNA Topology ...................................... 24
3.2.3 FM-Band CMOS LNA Design ...................................... 26
3.3 Mixer Circuit Design .............................................. 33
3.3.1 Mixer Topologies ............................................. 33
3.3.2 FM-Band CMOS Gilbert-Type Mixer Circuit Design ............... 34
3.4 IF Filtering Circuit Design ....................................... 38
3.4.1 Lowpass Filter Circuit Design ................................ 38
3.4.2 90 Degree Phase Shift Circuit (All-Pass Filter, APF) Design .. 44
3.4.3 IF Image-Rejection Filters for FM Receiver ................... 45
3.5 Switched-Capacitor Bandpass Filter Circuit Design ................. 47
3.5.1 Introduction of Switched-Capacitor Circuits .................. 47
3.5.2 Characteristics of Inverse Chebyshev Filter .................. 52
3.5.3 Filter Transfer Function ..................................... 54
3.5.4 SC BPF Filter Implementation ................................. 60
3.6 Operational Amplifier Circuit Design .............................. 62
3.7 Summary ........................................................... 65

Chapter 4 Implementation and Experiment Results 66
4.1 Floor Plan and Layout Considerations .............................. 66
4.2 Simulation Result ................................................. 69
4.3 Measurement Setup ................................................. 71
4.4 Summary ........................................................... 73

Chapter 5 Conclusions and Future Work 75
Bibliography 77
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