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研究生:顏業烜
研究生(外文):Ye-Xuan Yan
論文名稱:可重置之數位訊號處理平台設計與實現
論文名稱(外文):Design and Implementation of a Reconfigurable DSP Platform
指導教授:周哲民
指導教授(外文):Jer-Min Jou
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:英文
論文頁數:89
中文關鍵詞:可重置
外文關鍵詞:Reconfigurable
相關次數:
  • 被引用被引用:0
  • 點閱點閱:178
  • 評分評分:
  • 下載下載:12
  • 收藏至我的研究室書目清單書目收藏:0
  在系統單晶片(SOC)的領域,可重置架構(reconfigurable architectures)為最熱門的研究方向之一,可重置架構有著許多的優點,例如降低成本、加快研發速度,以及降低設計之複雜度與增強矽智產(IP)的可重用性(reusability)。
  在此篇論文中,我們提出一個高效率的可重置硬體平台內含粗顆粒的浮點運算單元用於快速的多媒體數位訊號處理。我們已經在ARM Integrator上,以一音訊編碼器對應至可重置硬體上為例來驗證我們的設計。最後,根據實驗的結果,軟硬體共同設計比純軟體平均快了3.31倍。
  Reconfigurable (field programmable) architectures now is one of the most popular research topics in SoC , since it may provide extremely advantages such as reducing the cost, time and complexity of design, and enhancing the reusability of IPs. Here, we presented an efficient reconfigurable hardware platform with the coarse-grained style floating-point function units for fast multimedia DSP processing. We have verified the platform by an example of mapping an audio encoder into it on the ARM Integrator and experimental results that the average speed up is 3.31 compared with the software-only approach.
摘要

Abstract

Chapter 1 Introduction ---------------------------------------------------------1
1.1 Introduction of reconfigurable architecture --------------------------------1
1.2 Overview MPEG Audio Layer III-----------------------------------------------2

Chapter 2 Reconfigurable architecture ------------------------------------------4
2.1 Statically and Dynamically reconfigurable systems---------------------------6
2.1.1 Statically reconfigurable systems-----------------------------------------6
2.1.2 Dynamically reconfigurable systems----------------------------------------7
2.2 Granularity of the reconfigurablesystems------------------------------------9
2.2.1 Fine-grained reconfigurable system----------------------------------------9
2.2.2 Coarse-grained reconfigurable system-------------------------------------10
2.3 Depth of programmability---------------------------------------------------12
2.4 Tightly-Coupled and Loosely-Coupled reconfigurable systems-----------------12
2.5 Self-reconfigurable computing systems--------------------------------------13

Chapter 3 ARM Integrator and bus architecture----------------------------------14
3.1 ARM Integrator overview----------------------------------------------------14
3.2 ARM Integrator AP----------------------------------------------------------15
3.3 ARM Integrator LM----------------------------------------------------------20
3.4 ARM Integrator CM----------------------------------------------------------23
3.5 ARM bus architecture-------------------------------------------------------29
3.5.1 Introducing the AMBA AHB-------------------------------------------------31
3.5.2 Introducing the AMBA APB-------------------------------------------------32

Chapter 4 Proposed reconfigurable architecture---------------------------------34
4.1 Functional units-----------------------------------------------------------35
4.1.1 Floating Adder-----------------------------------------------------------37
4.1.2 Floating Multiplication--------------------------------------------------38
4.4.3 Floating Division -------------------------------------------------------40

4.2 Register bank--------------------------------------------------------------42
4.3 Reconfigurable interconnecting network-------------------------------------42
4.4 Central controller---------------------------------------------------------45
4.5 ARM bus interface----------------------------------------------------------47
4.6 Communication issue--------------------------------------------------------49

Chapter 5 Mapping Audio Encoding into the reconfigurable platform--------------51
5.1 MP3 encoder algorithm------------------------------------------------------51
5.1.1 Introduction to MP3 Encoding---------------------------------------------52
5.1.2 wave file format---------------------------------------------------------53
5.1.3 Phase Analysis Filter Bank-----------------------------------------------56
5.1.4 MDCT---------------------------------------------------------------------57
5.1.5 Reordering---------------------------------------------------------------59
5.1.6 Alias Reduction----------------------------------------------------------59
5.1.7 Scalefactor Selection information (scfsi) Calculation--------------------60
5.1.8 Nonuniform Quantization--------------------------------------------------62
5.1.9 Huffman coding-----------------------------------------------------------62
5.2 MP3 encoder mapping--------------------------------------------------------64
5.2.1MP3 Encoder analysis------------------------------------------------------64
5.2.2 MP3 encoder mapping- Poly Phase Filter Bank------------------------------66
5.2.3 encoder mapping- MDCT----------------------------------------------------67
5.2.4 encoder mapping- Quantization--------------------------------------------68

Chapter 6 Implementation and Experiment result---------------------------------70
6.1 Hardware Implementation----------------------------------------------------70
6.2 Software environment setting and download----------------------------------72
6.2.1 Introduction of the software environment---------------------------------72
6.2.2 Environment setting and download software -------------------------------76
6.3 Experiment results---------------------------------------------------------80

Chapter 7 Multi-Tile DSP Platform----------------------------------------------83

Chapter 8 Conclusion-----------------------------------------------------------88

Reference----------------------------------------------------------------------89
Reference
[1] ARM INTEGRATOR /AP user guide.
[2] ARM INTEGRATOR/CM920T-ETM INTEGRATOR/CM940T-ETM user guide.
[3] ARM INTEGRATOR/LM-XCV600E+ INTEGRATOR/LM-EP20K600E+ user guide.
[4] ARM MULTI-ICE version 2.2 user guide.
[5] ARM developer suite version 1.1 compiler, linker, and utilities guide.
[6] AMBA Specification (Rev 2.0)
[7] Behrooz Parhami.“computer arithmetic algorithms and hardware designs”.
[8] David A. Patterson and John L. Hennessy, “computer organization & design
the hardware/software interface”.
[9] D. Pan. “A tutorial on MPEG/audio compression”, IEEE Multimedia, Vol. 2,
No. 2, Summer 1995.
[10] E. Tau, D. Chen, I. Eslick, J. Brown and A. DeHon, “A First Generation DPGA
Implementation”, FPD’95, Canadian Workshop of Field-Prog. Devices, May
1995.
[11] Guangming Lu. “Modeling, Implementation and Scalability of the MorphoSys
Dynamically Reconfigurable Computing Architecture”,
http://portal.acm.org/portal.cfm , 2000.
[12] Hartenstein, R ,“Trends in reconfigurable logic and reconfigurable
computing” Electronics, Circuits and Systems, 2002. 9th International
Conference on , Volume: 2 , 15-18 Sept. 2002 Pages:801 - 808 vol.2
[13] Hartenstein, R.;” A decade of reconfigurable computing: a visionary
retrospective”, Design, Automation and Test in Europe, 2001. Conference and
Exhibition 2001. Proceedings , 13-16 March 2001 Pages:642 – 649
[14] http://ccrma.stanford.edu/CCRMA/Courses/422/projects/WaveFormat/
[15] Jer-Min Jou. "Reconfigurable SoC Architectures," Proceedings of the 2003
VLSI Design/CAD Symposium, 2003.
[16] K. Brandenburg and H. Popp. “An introduction to MPEG Layer-3”, EBU
technical review, June 2000.
[17] Krister Lagerstrom. “Design and Implementation of an MPEG-1 Layer III Audio
Decoder” KRISTER LAGERSTROM. www.kmlager.com
[18] M. Aksit. “Dynamic, Adaptive and Reconfigurable Systems Overview and
Prospective Vision”, 2003 IEEE
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