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研究生:陳明和
研究生(外文):Ming-Ho Chen
論文名稱:應用於混模電路測試之一個針對週期性信號輸入做延遲取樣與加速離散傅立葉轉換的方法
論文名稱(外文):A Vernier Sampling for Periodic Signal and Speed-Up DFT Computation Method for Mixed Siganl Testing
指導教授:李崇仁李崇仁引用關係
指導教授(外文):Chung-Len Lee
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:92
語文別:中文
論文頁數:58
中文關鍵詞:延遲取樣離散傅立葉轉換
外文關鍵詞:vernier samplingDFT
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類比數位轉換器存在現今所有很多電路之中,一般測試類比數位轉換器的靜態規格時通常都是在類比數位轉換器的輸入端加入一個正弦信號並加以取樣由各個碼(code)所出現的次數來計算碼寬(code width)並由碼寬來求得DNL INL..等靜態規格.而在測試類比數位轉換器的動態規格時,通常是對類比數位轉換器的輸出加以作傅立葉轉換,而由傅立葉轉換後的頻譜中我們能加以求得ENOB SFDR..等動態規格。
在此論文中,吾人對上述類比數位轉換器測試之兩個關鍵的步驟及:(一)對轉換器之用Histogram 方式估算碼寬之取樣方式,及(二)於其輸出作傅立葉轉換過程之計算,做了一些研究。在 (一)項中,吾人提出一個微調(Vernier)式的取樣方法。如此可提減低量測過程中因雜訊干擾而產生之不準確度。吾人用例證來證明該方法之優越性。於(二)項中,吾人提出了一個加速傅立葉轉換計算之技巧來提高計算之效率。吾人亦用了兩個實際例證:一為類比數位轉換器,另一為帶通濾波器,來證明此方法之優性。

The Analog-to-digital converter (ADC) has now been widely used in the present day’s mixed signal circuit. To test an ADC,
usually the histogram method, i.e. a sinusoidal signal is applied to its input and its output codes are collected to obtain the histogram for calculation of code edges of ADC is used. Also, to a-c test the ADC, its sinusoidal output is subjected to the Fourier transformation (FT) computation to obtain its frequency spectrum information, which can be analyzed to obtain the ENOB, SFDR etc of the ADC.
In this thesis, addressing the above two issues, we have studied and proposed two techniques to (1) improve the noise-to-signal ratio of the histogram method for ADC code edge estimation; and (2) proposed a speed-up method for the FT computation. In the first method, a Simulink model employing an ADC testing under the noise consideration is used and analyzed to demonstrate its advantage. In the second method, two circuits examples, one is ADC and the other is a band-pass filter, are used to demonstrate the computation method saving.

CHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 BRIEF REVIEW ON METHODS FOR ADC TESTING 2
1.2.1 Histogram and DFT Method 2
1.2.2 Linear Ramp Histogram Method 2
1.2.3 Sinusoidal Histogram Method 4
1.3 REVIEW OF RELATED PREVIOUS WORKS 6
1.4 DISCRETE FOURIER TRANSFORM (DFT) 7
1.5 BRIEF DESCRIPTION OF THIS THESIS 8
CHAPTER 2 STUDY ON VERNIER SAMPLING FOR PERIODIC SIGNAL 9
2.1 BASIC IDEA OF VERNIER SAMPLING FOR THE PERIODIC SIGNAL 9
2.2 SCHEMATIC OF VERNIER SAMPLING IN SIMULINK 11
2.3 EXPERIMENTAL VERIFICATION ON THE ACCURACY IMPROVEMENT OF THE VERNIER SAMPLING TECHNIQUE 12
2.4 CODE ESTIMATION EXAMPLE. 19
2.5 SIMULATION RESULTS OF ERROR ROOT-MEAN-SQUARE. 26
CHAPTER 3 A SPEED-UP DFT COMPUTATION METHOD 30
3.1 THE SET UP FOR THE SPEED-UP DFT COMPUTATION METHOD 30
3.2 SCHEMATIC AND THEORY OF SPEED-UP DFT IN SIMULINK 32
3.3 THEORETICAL PROOF FOR THE SPEED-UP DFT COMPUTATION METHOD 33
3.4 Simulation Results on the Speed-up DFT Computation Method on 4-Bit ADC 34
3.5 SIMULATION RESULTS ON THE SPEED-UP DFT COMPUTATION METHOD ON A MULTI-TONE INPUT SIGNAL 40
3.6 SIMULATION RESULTS ON THE SPEED-UP DFT COMPUTATION METHOD ON AN EXAMPLE FILTER 40
CHAPTER 4 CONCLUSION 40

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VLSI Design, 2001. Fourteenth International Conference on , 3-7 Jan. 2001 Page(s): 274 -282.
[2] Holcer, R.; Michaeli, L.; “DNL ADC testing by the exponential shaped voltage” Instrumentation and Measurement Technology Conference, 2001. IMTC 2001. Proceedings of the 18th IEEE , Volume: 1 , 21-23 May 2001
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[3] Arabi, K.; Kaminska, B.; “Efficient and accurate testing of analog-to-digital converters using oscillation-test method” European Design and Test Conference, 1997. ED&TC 97. Proceedings , 17-20 March 1997 Page(s): 348 -352
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[5] Alegria, F.; Arpaia, P.; da Cruz Serra, A.M.; Daponte, P.; “Performance analysis of an ADC histogram test using small triangular waves” Instrumentation and Measurement, IEEE Transactions on , Volume: 51 Issue: 4 , Aug. 2002 Page(s): 723 -729
[6] Larrabee, J.H.; Hummels, D.M.; Irons, F.H.; “ADC compensation using a sinewave histogram method” Instrumentation and Measurement Technology Conference, 1997. IMTC/97. Proceedings. 'Sensing, Processing, Networking'., IEEE , Volume: 1 , 19-21 May 1997 Page(s): 628 -631 vol.1
[7] Variyam, P.N.; Agrawal, V.; “Measuring code edges of ADCs using interpolation and its application to offset and gain error testing” Test Conference, 2000. Proceedings. International , 3-5 Oct. 2000 Page(s): 349 -357
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