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研究生:方彥傑
研究生(外文):Yen-Chieh Fang
論文名稱:薄膜電感被動元件之製備與模擬分析
論文名稱(外文):Fabrication and simulation of passive integrated devices (inductors) using thin film technology
指導教授:廖建能
指導教授(外文):Chien-Neng Liao
學位類別:碩士
校院名稱:國立清華大學
系所名稱:材料科學工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:中文
論文頁數:79
中文關鍵詞:品質因子電感值共振頻率電磁模擬薄膜電感底層金屬遮蔽
外文關鍵詞:QLfsrElectromagnetic SimulationThin film inductorPattern Ground Shield
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隨著無線通訊與可攜式通訊產品朝著高頻化、體積小、功能強、高穩定性的趨勢持續發展,其零組件必須採積體電路化方式完成,當前國內主動元件的體積縮小能力遠超過被動元件,如要將兩者整合,被動元件的薄膜化製程將是未來急需發展的關鍵技術。
本實驗以微影及濕蝕刻方式製備薄膜電感結構,利用向量網路分析儀與Cascade共平面GSG探針量測電感的散射參數,另外再配合ADS與 SONNET軟體,分析、模擬、探討不同的電感尺寸與底層金屬遮蔽結構變化其品質因數Q 、電感值、共振頻率等高頻特性 。
由實驗結果得知,長方形電感之電感值雖比正方形電感大一個數量級,但從共振的觀點而言,長方形因佔據較大面積有較高的寄生電容,其可操作的頻率範圍不高。製作底層金屬遮蔽的方式試圖提升電感的品質因數,雖未能有效達到目的,但透過電磁軟體的模擬分析,可了解若要有效發揮底層金屬遮蔽的功用,必須配合適當的電感尺寸與製程條件,本實驗所製備之薄膜電感其高頻特性最佳為QMax=2.65、共振頻率fsr=14.82Ghz。
High operation frequency, miniaturization, functionality, and reliability are the trends of future wireless and portable communication productions. Circuit integration becomes essential for the development. The shrinking and integration capability of active devices greatly exceeds that of passive ones. If both the active and the passive devices are to be integrated together, the thin film process technology for passive devices will play a crucial role in future development.
In this study photolithography and wet etching techniques are utilized to fabricate thin film inductors. By using Vector Network Analyzer and Cascade coplanar probes, scattering parameters of the thin inductor were measured. With the help of ADS and SONNET simulation analysis, effect of geometry and ground shield pattern on the high frequency characteristics of the inductors, e.g. quality factor, inductance and self-resonance frequency were discussed.
According to our experimental results, the inductance of rectangular inductor was found to be higher than that of square inductor by one order of magnitude. Nevertheless, the rectangular inductors have a lower self-resonance frequency due to the larger surface area, and hence larger parasitic impedance. Using a patterned ground shield beneath the inductor was planned to enhance quality factor of the inductors. Although we are not able to achieve the goal, but electromagnetic simulation results indicated that only the inductors having appropriate optimization of geometry and process conditions can gain the advantage from pattern ground shield. The optimum performance of the thin film inductor fabricated was found to be QMax = 2.65 and fsr = 14.82 Ghz.
摘 要..................................................................................................Ⅰ
目 錄…………………………………………………...………….. Ⅳ
圖目錄………………………………………………………………..Ⅷ
表目錄………………………………………………………………..XI
第一章、 簡介
1.1研究背景……………………..……………………………...…..1
1.2矽半導體製程…………………………………...………………1
1.3被動元件的薄膜化與積體化…………………………………...2
1.4論文架構………………………………………………………...3
第二章、文獻回顧
2.1矽製程與薄膜製程技術(重要性、發展性、限制性、功能與高頻特性、改進方向)……………………………………….4
2.1.1矽製程技術………………………………………………4
2.1.2薄膜化製程技術…………………………………………6

2.2電感理論計算…………………………………………......…….9
2.2.1自感…………………………………………………..…10
2.2.2互感…………………………………………………......11

2.3矽基平面螺旋電感…………………………………………….15
2.3.1等效電路模型…………………………………………..15
2.3.2寄生效應與基材損耗…………………………………..18
2.3.3品質因數………………………………………………..19


第三章、實驗原理與步驟
3.1試片製備……………………………………………………….20
3.1.1光罩圖案………………………………………………..20
3.1.2爐管前清洗……………………………………………..22
3.1.3絕緣層沉積……………………………………………..22
3.1.4金屬薄膜沉積………………………………………..…22
3.1.5黃光製程………………………………………………..24
3.1.6金屬薄膜蝕刻…………………………………………..25
3.1.7沉積介電層……………………………………………..26
3.1.8引洞……………………………………………………..26


3.1.9元件製作流程………………………………………......26

3.2 實驗原理……………………………………………….……..28
3.2.1高頻量測……………………………….……………28
3.2.2晶圓級量測法……………………………………...28
3.2.3量測校正……………………………..…………….30
3.2.3.1儀器校正(SLOT calibration)………………….30
3.2.3.2去嵌入(de-embedding)法……………………..30
3.2.4散射參數(Scattering Parameter)………………...31
3.2.5參數萃取………………………………………………34

第四章、實驗結果與討論………………………………………………35
4.1製程參數…………………………………………………..…...37
4.1.1濕蝕刻參數……………………………………….….....37
4.1.2接觸點………………………………………….…….....44
4.1.3等效電路模型的參數計算…………………………......45

4.2平面螺旋電感………………………………………………….49
4.2.1正方形螺旋電感………………………………………..49
4.2.1.1高頻量测………………………………………...…49
4.2.1.2參數萃取…………………………………………...58

4.2.2長方形螺旋電感………………………………………..67
4.3底層金屬遮蔽圖案的效應…………………………………….70


第五章、結論……………………………………………………………76
參考文獻……………………………………………………..…..……..78














圖目錄


圖2-1 兩條相互耦合、尺寸相同的金屬平行線…………………...…9
圖2-2 自感與金屬導線截面的關係…………………..………………11
圖2-3 自感與金屬導線長度的關係…………………………………..11
圖2-4 間距s相對於互感、互偶係數的關係…………………………13
圖2-5 中心距d相對於互感、互耦係數的關係……………………..14
圖2-6 正負互感示意圖………………………………………………..15
圖2-7 矽基材平面螺旋電感剖面圖…………………………………..17
圖2-8 矽基材平面螺旋電感等效電路模型………………….……….17
圖2-9 等效電路模型與頻率有關的形式…………………..…………18
圖3-1 (A) 正方形電感光罩圖形………………………………...…….21
圖3-1 (B) 長方形電感光罩圖形…………………………….……...…21
圖3-2電感結構剖面示意圖……………...……………………………23
圖3-3 電感結構製作流程......................................................................28
圖3-4 (a)G-S-G (b)G-S型式的微波探針………….…………………31
圖3-5 (A)OPEN. (B)SHORT. (C)THRU校正式意圖………..……..…32
圖3-6雙埠網路S參數基本定義………………….…………………..35
圖4-1光阻剝落示意圖…………………………………………………40
圖4-2側蝕與底切………………................……………………………40
圖4-3金屬層重疊處斷線示意圖………………………………..…..…41
圖4-4側蝕改善示意圖……………………….…………….…………..41
圖4-5正方形螺旋電感結構(NGS)……………...………….…………42
圖4-6長方形螺旋電感結構…...……………….………………………42
圖4-7具MGS之螺旋電感結構……………….…..……..…………….43
圖4-8具PGS1之螺旋電感結構………….………………...……..…...43
圖4-9具PGS2之螺旋電感結構………….……………………………43
圖4-10金屬繞線剖面示意圖..................................................................44
圖4-11金屬繞線的局部側蝕..................................................................44
圖4-12金屬與介電層堆疊剖面圖…...………………………………...45
圖4-13空結構示意圖………………………..……………..…………..53
圖4-14品質因數的去嵌入效應……………………….…...…………..53
圖4-15電感的去嵌入效應……..………………………………………54
圖4-16實部阻抗的去嵌入效應………………..………………………54
圖4-17正方形螺旋電感之品質因數模擬與量測…...……..……….....55
圖4-18正方形螺旋電感之電感值模擬與量測………….…………….55
圖4-19正方形螺旋電感之實部阻抗模擬與量測….……………….…56
圖4-20不同線寬的Q值比較……….…………………………….……56
圖4-21不同線寬的L值比較……….…………………………….……57
圖4-22模擬不同線寬的Q值比較……….……………………….……57
圖4-23模擬不同線寬的L值比較……………………………………..58
圖4-24 ADS工作平台與等效電路模型示意圖…………………….....64
圖4-25 ADS工作平台與等效電路模型接地示意圖………………….64
圖4-26 Qideal與Qreal偏差值示意圖…………..…………………………65
圖4-27 Cox值萃取隨頻率變化關係圖…………………………………65
圖4-28量測、等效電路模型、參數萃取之Q……………...…………...66
圖4-29量測、等效電路模型、參數萃取之L值…………….………….66
圖4-30量測、等效電路模型、參數萃取之實部阻抗值……………..…67
圖4-31正方形、長方形螺旋電感的品質因數………..………………..69
圖4-32正方形、長方形螺旋電感的電感值…………..………………..70
圖4-33量測不同底層金屬遮蔽圖案對品質因數的影響…..…………73
圖4-34量測不同底層金屬遮蔽圖案對電感值的影響….….…………73
圖4-35模擬不同底層金屬遮蔽圖案對品質因數的影響………..……74
圖4-36模擬不同底層金屬遮蔽圖案對電感值的影響………………..74
圖4-37模擬不同底層金屬遮蔽厚度對品質因數的影響….………….75
圖4-38模擬不同電感尺寸對品質因數的影響…………….………….75
圖4-39模擬不同尺寸、製程條件對品質因數的影響…………………76
表目錄


表2-1厚膜與薄膜製程的比較……………………………………..…....7
表4-1各項製程條件……………………………………………..……..48
表4-2鉭-銅-鉭金屬薄膜電阻率……………..………………….……..49
表4-3正方形螺旋電感模擬與量測QMax、LMax、fsr的比較………….…57
表4-4不同線寬QMax、LMax、fsr的比較………………………………….58
表4-5電感等效電路模型之計算與萃取值……………………………66
表4-6量測、等效電路模型、參數萃取之QMax、LMax、fsr比較….………67
表4-7正方形、長方形螺旋電感QMax、LMax、fsr的比較………………...69
表4-8不同結構間QMax、LMax、fsr的比較…….…………………………75
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