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研究生:劉昆明
論文名稱:銅/鉭接觸電阻對銅導線電流壅塞效應影響之研究
指導教授:廖建能
學位類別:碩士
校院名稱:國立清華大學
系所名稱:材料科學工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:中文
論文頁數:68
中文關鍵詞:電流壅塞接觸電阻測試結構模擬
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隨著積體電路製程技術進步,積體電路元件密集度大幅增加,電子元件尺寸越作越小,這使得電流密度逐漸增大,和產生局部的電流壅塞現象,此皆會對元件的可靠度造成不利的影響。本實驗擬藉由氫電漿的表面處理來調整銅/鉭間的接觸電阻,並利用電腦的模擬來分析銅/鉭的接觸電阻對電流壅塞的影響,
本實驗利用黃光微影製程製備試片,來探討銅/鉭接觸電阻受表面處理、電流和溫度的影響。首先利用Kelvin測試結構量測接觸電阻,接點尺寸由20×20μm2到4×4μm2。研究發現表面處理對銅/鉭間的接觸電阻有很直接的影響,表面處理可明顯的降低接觸電阻。此外接觸電阻亦會受到電流和溫度的影響,當電流越大或溫度越高時接觸電阻會有下降的趨勢。
在模擬方面,使用模擬軟體FlexPDE來分析在Blech結構中接觸電阻對電流分佈的影響。模擬結果顯示,接觸電阻的存在的確會改變電流的分佈,當接觸電阻越大,則銅膜所能達到的最大電流密度會越小,且銅導線內的電流壅塞效應越不明顯。
With the evolution of VLSI process technology, continuous scaling of integrated circuit(IC) leads to increasing density of integrated circuits(IC) regime. High current density and current crowding phenomenon associated with the scaling may cause severe reliability problems. In the experiment, we modulate the Cu/Ta contact resistance by using hydrogen plasma for Ta surface pretreatment and explore the effect of contact resistance on current crowding behavior in Cu metallization.
The samples used to study the influence of current density and surface pretreatment on the electrical/thermal properties of Cu/Ta contacts were prepared by conventional photolithography technique. A four-terminal Kelvin test structure were employed to measure the resistance of the contacts which have the contact size ranging from 4×4μm2 to 20×20μm2. It is found that the contact resistance is strongly affected by surface pretreatment conditions. Hydrogen plasma pretreatment was able to reduce the contact resistance significantly. Furthermore, the contact resistance was also affect by applied current and temperature, which decreased with increasing temperature and applied current.
In the part of simulation, an commercial software, FlexPDE, were utilized to analyze the current distribution in Blech test structure. The simulation shows that the maximum current flowing into Cu strip decrease as the contact resistance increases. Besides, high contact resistance tends to spread out the current and reduce current crowding.
第一章、緒論…………………………………………………………01
1.1研究動機………………………………………………………….01
1.2實驗目的………………………………………………………….02
第二章、文獻回顧……………………………………………………03
2.1文獻回顧………………………………………………………….03
2.1.1電遷移………………………………………………………….03
2.1.2電遷移理論模型……………………………………………….04
2.1.3電流壅塞對電遷移之影響…………………………………….09
第三章、實驗規劃……………………………………………………12
3.1試片製備………………………………………………………….12
3.1.1 試片清洗………………………………………………………12
3.1.2 薄膜沉積部份…………………………………………………15
3.1.3 第一道微影和蝕刻製程………………………………………16
3.1.4 電漿表面處理…………………………………………………19
3.1.5 第二道微影和蝕刻製程………………………………………20
3.1.6 氮化矽(Si3N4)的沈積............................21
3.2研究方法………………………………………………………….23
3.2.1 不同表面處理條件對鉭薄膜片電阻和電阻率之影響......23
3.2.2 不同表面處理條件對鉭和銅膜間接觸電阻之影響........25
第四章、實驗結果與討論……………………………………………30
4.1 製程方面…………………………………………………………30
4.1.1 鉭蝕刻…………………………………………………………30
4.1.2 銅蝕刻…………………………………………………………33
4.2 電性量測方面……………………………………………………36
4.2.1 表面處理對鉭電阻率及接觸電阻之影響……………………39
4.2.2 溫度對接觸電阻之影響………………………………………43
4.2.3 電流對接觸電阻之影響………………………………………45
4.3 電流壅塞效應模擬………………………………………………50
4.3.1 接觸電阻對電流壅塞之影響…………………………………52
4.3.2 接觸電阻對電遷移之影響……………………………………60
第五章、結論…………………………………………………………65
參考文獻………………………………………………………………67
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