跳到主要內容

臺灣博碩士論文加值系統

(3.231.230.177) 您好!臺灣時間:2021/08/04 10:49
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

: 
twitterline
研究生:范直賓
研究生(外文):Chih-Bin Fan
論文名稱:一個以進階微控制器匯流排架構為基礎的系統單晶片矽智財整合方法
論文名稱(外文):An IP Integration Methodology for AMBA-Based SOC
指導教授:林永隆林永隆引用關係
指導教授(外文):Youn-Long Lin
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:英文
論文頁數:41
中文關鍵詞:整合平台進階微控制器匯流排架構
外文關鍵詞:IntegrationPlatformAMBA
相關次數:
  • 被引用被引用:0
  • 點閱點閱:184
  • 評分評分:
  • 下載下載:25
  • 收藏至我的研究室書目清單書目收藏:0
系統單晶片設計(System-on-Chip)有賴於在系統平台上整合可重複使用且已經完成設計及驗證流程的硬體加速器,即所稱的矽智財,來減少開發產品所需的時間,我們在這篇論文中提出了一個分層的平台整合方法,並選定目前最普遍被使用的進階微控制器匯流排架構(AMBA)來做為我們介面資料傳輸的標準,我們使用這個方法來將硬體加速器整合到一個以進階微控制器匯流排架構為基礎的系統單晶片上,工程師可藉由此方法整合硬體加速器到系統單晶片的平台上,而並不需要明白進階微控制器匯流排架構的規格,這種整合方法和以往只在平台上另行加入一個直接記憶體存取(DMA)模組來負責資料傳輸的方法相比,可以降低半數在匯流排上的資料傳輸,所以可以將資料傳輸的時間減半,如此一來可以得到更好的結果,我們並使用了JPEG解碼器整合離散餘弦函數轉換(Discrete Cosine Transform, DCT)硬體加速器和JPEG2000編碼器整合離散小波轉換(Discrete Wavelet Transform, DWT)硬體加速器及嵌入式區塊最佳化切割編碼(Embedded Block Coding with Optimized Truncation, EBCOT)硬體加速器來驗證所提出的方法。
System-on-chip (SOC) design relies on reuse of pre-designed and pre-varified hardware devices, also called intellectual properties (IPs). We choose the most popular on-chip bus standard, AMBA (Advanced Microcontroller Bus Architecture), as our communication interface protocol. We propose a kind of layered integration methodology to integrate IPs into AMBA-based SOC system. Engineers can follow the methodology to integrate IPs into AMBA-based SOC system without AMBA protocol know-how. This integration has better performance than DMA-based integration. The methodology reduces half of data transfer on bus compare with DMA. We demonstrate the proposed methodology with a JPEG decoder and a JPEG2000 encoder case.
ABSTRACT
CONTENTS
LIST OF FIGURES
LIST OF TABLES

CHAPTER 1.....1
INTRODUCTION
1.1 PLATFORM-BASED DESIGN AND IP REUSE
1.2 INTEGRATION OVERVIEW
1.3 PLATFORM AND DESIGN FLOW OVERVIEW
1.4 THESIS ORGANIZATION
CHAPTER 2.....7
PREVIOUS WORK
2.1 INTEGRATION METHODOLOGIES
2.2 IP INTEGRATION ARCHITECTURE
CHAPTER 3.....9
AMBA SPECIFICATION
3.1 INTRODUCTION OF AMBA
3.2 AMBA AHB
3.2.1 AMBA AHB Signal List
3.2.2 AHB Transfer Type
3.3 AHB DEVICE IMPLEMENTATION
3.3.1 AHB Slave Interface and FSM
3.3.2 AHB Master Interface and FSM
3.3.3 AHB DMA and FSM
CHAPTER 4.....22
PROPOSED INTEGRATION METHODOLOGY
4.1 APPLICATION LAYER
4.2 FUNCTION LAYER
4.3 IP ANALYSIS LAYER
4.3.1 IP Execution Requirements
4.3.2 IP Execution Cycle Estimation
4.3.3 IP Communicating Method
4.4 IMPLEMENTATION LAYER
4.4.1 Reusable Slave Interface
4.4.2 Reusable Master Interface
4.4.3 Software Driver
4.4.4 Control Logic
4.4.5 Modification for Platform Constraints
4.5 INTEGRATION LAYER
CHAPTER 5.....33
EXPERIMENTAL RESULT
5.1 INTEGRATION FOR DWT AND EBCOT TIER-1 IPS
5.2 SYNTHESIS REPORT
5.3 JPEG DECODER REPORT
5.4 DWT AND EBCOT TIER-1 REPORT
CHAPTER 6.....37
CONCLUSION
BIBLIOGRAPHY.....38
[1]David Flynn, “AMBA: Enabling Reusable On-Chip Designs”, IEEE Micro, 1997, pp. 20-27.
[2]Erno Salminen, Vesa lahtinen, Kimmo Kuusilinna, Timo Hamalainen, “Overview of Bus-based System On Chip Interconnections,” IEEE International Symposium on Circuits and System, vol. 2, pp. 372-375, May 2002
[3]G. V. Micheli, R.K. Gupta, “Hardware/Software Co-Design” IEEE Proceedings, vol. 85, NO. 3, March 1997
[4]Han Qi, Zheng Jiang, Jia Wei, “IP Reusable Design Methodology,” IEEE Proceedings, the 4th International Conference on ASIC, pp. 756-759, Oct. 2001
[5]H. Kalte, D. Langen, E.Vonnahme, A.Brinkmann, U. Ruckert, “Dynamically Reconfigurable System-on-Progrmmable Chip,” IEEE Proceedings of 10th Euromicro WorkShop on Parallel, Distributed and Network-based Processing, pp. 235-242, January 2002
[6]Jer-Min Jou, Shiann-Rong Kuang, Kuang-Ming Wu, “A Hierarchical Interface Design Methodology and Models for SOC IP Integration,” IEEE International Symposium on Circuits and System, vol.2, pp. 360-363, May 2002
[7]Jose Carlos Palma, Aline Vieira de Mello, Leandro Moller, Fernando Moraes, Ney Calazans, “Core Communication Interface for FPGAs,” IEEE Proceedings, the 15th Symposium on Integrated Circuits and System Design, pp. 183-188, Sept. 2002
[8]Maalej, I, Gogniat, G, Abid, M, Philippe, “J.L.; Interface design approach for system on chip based on configuration,” in processing of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. Volume: 5 , 25-28 May 2003
[9]Maik Boden, Jorg Schneider, Klaus Feske, Steffen Rulke, “Enhanced Ruesability for SoC-based HW/SW Co-Design,” IEEE Proceedings of the Euromicro Symposium on Digital System Design, 2002
[10]P. Coussy, A. Baganne, E. Martin, “Platform-Based Design for Digital Signal Processing System: A Case Study of MPEG-2 / JPEG2000 Encoder,” IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions, vol. 2, pp. 1361-1366, July 2002
[11]Po-Hao Chang, “Hardware software co-design and Implementation of Wavelet-based Video Compression System,” Department of Electrical Engineering National Cheng Kung University, June 2002
[12]Roman L. Lysecky, Frank Vahid*, Tony D. Givargis, “Experiment with the Peripheral Virtual Component Interface,” IEEE Proceedings, the 13th Internation Symposium on System Synthesis, pp. 221-224 Sept. 2000
[13]Shih-Chieh Chang, “Implementation of on-chip bus - AMBA”, Department of Computer Science National Tsing Hua University, June 2002
[14]W. Wolf, “A Decade of Hardware/Software Codesign,” IEEE Proceedings of computer, vol. 36, pp. 38-43, April 2003
[15]AMBA specification, refer to ARM Limited web page: http://www.arm.com
[16]Virtual Components Interface Standard, refer to VSIA web page: http://www.vsi.org
[17]ARM PrimeCell Single Master DMA Controller Technique Reference Manual: http://www.arm.com
[18]Literature: Embedded Software Design, ALTERA Corporation, Available: http://www.arm.com
[19]http://www.altera.com/literature/quartus2/lit-emb.jsp
[20]Literature: Excalibur, ALTERA Corporation, Available: http://www.altera.com/literature/lit-exc.jsp
[21]Literature: Quartus II Development Software, ALTERA Corporation, Available: http://www.altera.com/literature/lit-qts.jsp
[22]Literature: SOPC Builder, ALTERA Corporation, Available: http://www.altera.com/literature/lit-sop.jsp
[23]ALTERA Corporation, on-line literatures,
http://www.altera.com/literature/lit-index.html
[24]ModelSim SE user manual, Mentor Graphics Inc., Abailable: http://www.model.com/support/docs.asp?id=121
[25]ARM Inc., application notes,
http://www.arm.com/documentation/board-and -firmware/index.html
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top