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研究生:鍾啟晨
論文名稱:應用於慣性感測器之微電容感測電路設計
論文名稱(外文):The design of micro-capacitive sensing circuit for inertial sensor
指導教授:曾繁根曾繁根引用關係柳克強
學位類別:碩士
校院名稱:國立清華大學
系所名稱:微機電工程研究所
學門:工程學門
學類:機械工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:中文
論文頁數:78
中文關鍵詞:微電容感測電路
外文關鍵詞:micro-capacitive sensing
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本論文主要研究慣性感測器之微電容感測電路,用於汽車中安全氣囊或導航系統中訊號的感測,由於所感測的電容訊號極微小(10-15F),故需要一能抵抗雜訊、高準確度的電路系統來作感測。論文中說明四種常見的感測電路,並且說明電路上的不理想特性及來源,以及如何改善,經由分析後,我們選擇以差動輸出的方式作為微電容感測電路的架構,原因是此架構可以消除共模的雜訊及電路中的雜散電容且架構簡單。而設計一之電路系統由兩匹配的微電容感測電路及抗雜訊的差動放大器所組成,輸入訊號由兩組相位相反的時脈訊號來控制。設計二之電路是由兩匹配的感測電路及二級高增益放大器所構成,並提出電容匹配及抵抗雜訊之保護環佈局技術來降低誤差源。
而經由HSPICE電路模擬得知設計一的電路其輸出增益為19V/pF,總輸出雜訊約為1.26 mV,故可以得知電路最小可感測的電容值約為0.7fF;測試結果顯示電路的解析度約為50~100fF,其誤差來源為製程不匹配及測試時雜訊所造成的。而設計二的電路經HSPICE模擬得到輸出增益為190V/pF,總輸出雜訊約為2.7386 mV,故可以得知電路最小可感測的電容值約為10 aF。
This thesis researched the micro-capacitive sensing circuit for inertial sensor which used to sense poor signal in air bag or navigation. Due to the sensing capacitive signal was extremely small (10-15F), so it needed a noiseless and a high precision circuit for sensing. Thesis introduced typically four type sensing circuit , analyzed the source of nonideal effect and improvement. We chose the differential type of sensing circuit, because this architecture could cancel the common mode noise, stray capacitance and easy to analysis. The first generation of circuit design included of two matching micro-capacitive sensing circuit , noiseless differential amplifier and the input were controlled by two out of phase clock signal. The second generation of circuit design included of two matching micro-capacitive sensing circuit , two stage high gain amplifier. Layout used capacitance match , guard rings to protect core circuit and lower the interfere of EM.
The simulation results of first generation circuit showed that output gain was 19V/pF and the total noise was about 1.26 mV. So that the circuit resolution was about 0.7fF, but experiment showed the circuit resolution was about 50~100fF. We knew that the error were due to noise and dc offset. The simulation results of second generation circuit showed that output gain was 190V/pF and the total noise was about 2.7386 mV. So that the circuit resolution was about 10aF.
目錄
目錄………………………………………………………………………I
圖目錄…………………………………………………………………...IV
表目錄………………………………………………………………….VIII

第一章 緒論……………………………………………………………..1
1.1 研究背景…………………………………………………………….2
1.2 研究動機與目的…………………………………………………….6
第二章 微型陀螺儀系統之感測原理…………………………………..8
2.1振動式陀螺儀感測原理……………………………………………..8
2.1.1 運動理論分析………………………………………………..9
2.2微型陀螺儀系統架構……………………………………………….15
2.2.1 Sigma-Delta架構簡介………………………………………16
2.2.2微陀螺儀使用Sigma-Delta之架構………………………...16
第三章電容感測電路…………………………………………………..20
3.1前言…………………………………………………………………20
3.2文獻回顧……………………………………………………………20
3.2.1同步感測電路………………………………………………..20
3.2.2切換式電容感測電…………………………………………..22
3.2.3 差動式輸出之電容感測………………………………….…24
3.3高電壓驅動與感測電路的介……………………….………..........…26
3.3.1耦合電容及靜電放電保護……………………………………..26
3.4電路的非理想特性…………………………………………………...27
3.5電容式電路的誤差…………………………………………………...28
3.5.1放大器的抵補電壓…………………………………………..…28
3.5.2放大器1/f雜訊…………………………………………………28
3.5.3開關誤差………………………………………………………..29
3.5.4開關KT/C雜訊………………………………………...………31
3.6 Correlated Double Sampling………………………….............………32
3.7放大器熱雜訊最佳化………………………………………...........…34
第四章差動式微電容感測電路之設計…………………………………38
4.1前言…………………………………………………………………38
4.2微電容感測電路之設計……………………………………………38
4.2.1系統電路架構之設計………………………………………..40
4.2.2HSPICE電路模擬結果……………………………………....42
4.2.3電路佈局……………………………………………………..46
4.2.4全差動式電容感測電路設計(一)電路測試結果…………...48
4.3全差動式電容感測電路之設計二…………………………………52
4.3.1CMOS運算放大器之設計…………………………………..53
4.3.2放大器之增益……………………………………………….54
4.3.3頻率響應…………………………………………………….55
4.3.4 Slew Rate………………………………………………….....57
4.3.5 輸入偏移電壓………………………………………………58
4.3.6輸入級……………………………………………………….59
4.3.7運算放大器之補償………………………………………….60
4.3.8偏壓級設計………………………………………………….64
4.3.9電容感測電路設計二之電路模擬………………………….66
4.3.10電容感測電路設計二之電路佈局………………………...69
第五章 結論……………………………………………………………72
第六章 未來工作………………………………………………………73
參考文獻………………………………………………………………..77
















圖目錄
圖1-1.三軸六個自由度感測示意圖…………………………………….2
圖1-2.微機電慣性感測器價格與性能圖……………………………….2
圖1-3.Analog Device陀螺儀ADXRS150………………………………6
圖2-1 地球自轉產生科氏力說明圖……………………………………9
圖2-2 空間中的旋轉座標圖…………………………………………...10
圖2-3懸臂樑簡圖………………………………………………………12
圖2-4懸臂樑集中質量模型…………………………………………....12
圖2-5 閉迴路系統架構………………………………………………...15
圖2-6 微型陀螺儀輸出輸入示意圖…………………………………...17
圖2-7 Sigma-Delta微陀螺儀系統……………………………………...17
圖 2-8 Deadzone說明圖………………………………………………..19
圖 3-1 同步感測電路…………………………………………………..21
圖3-2 解調後的訊號及雜訊頻率……………………………………...22
圖3-3切換式電容電路架構…………………………………………....23
圖3-4 Pseudo-differential感測電路架…………………………………25
圖3-5 Pseudo-differential之IPCMFB迴授感測電路架構…………...26
圖3-6耦合電容及靜電放電保護電路…………………………………27
圖3-7(a) charge injection………………………………………………..30
圖3-7(b) clock feedthrough…………………………………………….30
圖3-8 bottom-plate和center switch的差動電路……………………..30
圖3-9Correlated Double Sampling運作過程………………………….34
圖3-10感測相位時的積分電路與輸入雜訊………………………….35
圖4-1微電容感測電路之設計………………………………………...39
圖4-2 微電容感測電路之簡化模型…………………………………..40
圖4-3 系統電路方塊圖………………………………………………..40
圖4-4微電容感測電路系統圖………………………………………...41
圖4-5(a) 輸入的時脈訊號clk1、clk3………………………………...42
圖4-5(b) 輸入的時脈訊號clk2、clk4………………………………...42
圖4-6(a)ΔC=1pF時之電壓輸出……………………………………….43
圖4-6(b)ΔC=0.1pF時之電壓輸出……………………………………..43
圖4-6(c)ΔC=10fF時之電壓輸出………………………………………43
圖4-6(d)ΔC=1fF時之電壓輸出………………………………………..44
圖4-7輸出增益圖………………………………………………………45
圖4-8 電路雜訊模擬圖………………………………………………...45
圖4-9 電路佈局圖…………………………………………………….. 47
圖4-10 製作封裝好的IC……………………………………………....48
圖4-11 製作好未封裝的裸晶………………………………………….48
圖4-12 測試方塊示意圖………………………………………………49
圖4-13 量測儀器接線圖………………………………………………49
圖4-14 ∆Csense=1pF…………………………………………………...51
圖4-15 ∆Csense=500fF…………………………………………………51
圖4-16 ∆Csense=50fF………………………………………………......52
圖4-17 C-V曲線………………………………………………………..52
圖4-18全差動式電容感測電路之設計二架構圖……………………..53
圖4-19二級運算放大器架構…………………………………………..54
圖4-20 CMOS二級運算放大器………………………………………..54
圖4-21簡化的頻率響應模型…………………………………………..56
圖4-22運算放大器之輸入與增益級…………………………………..59
圖4-23 運算放大器及其補償電路…………………………………….61
圖4-24 運算放大器補償電路之小訊號模型………………………….61
圖4-25偏壓級、第二級和補償電路…………………………………..63
圖4-26 放大器之電流源電路………………………………………….66
圖4-27 二級放大器之波得圖………………………………………….67
圖4-28 設計二之電容感測電路電路圖……………………………….67
圖4-29 輸入時脈訊號………………………………………………….68
圖4-30 C-V轉移曲線…………………………………………………..68
圖4-31 雜訊分析圖…………………………………………………….69
圖4-32同心圓之電容佈局圖…………………………………………..70
圖4-33保護環之佈局…………………………………………………..70
圖4-34 電路設計二之佈局圖………………………………………….71
圖6-1 CHS電路架構圖………………………………………………...74
圖6-2 差動折疊疊接之電路圖………………………………………...74
圖6-3 差動折疊疊接偏壓電路圖……………………………………...75
圖6-4 差動折疊疊接電路之波得圖…………………………………...75
圖6-5 Gibbert cell乘法器電路圖……………………………………....76














+





表目錄
表3-1切換式電容感測電路的誤差及解決方式………………………32

表4-1 電路模擬規格表………………………………………………...46
參考文獻
[1] M.A. LEMKIN et al, “A 3-axis force balanced accelerometer using a single proof-mass,” Solid State Sensors and Actuators, Vol. 2, pp. 1185-1188, 1997.
[2]Analog Device ADXL210 accelerometer datasheet. http://www.analog.com/pdf/ADXL202_10_b.pdf.
[3]Navid Yazdi,Farrokh ayazi, and Khalil Najafi, “ Micromachined Inertial sensor’’, Proc.of the IEEE.Aug.1998,pp1640-1659
[4] B. E. Boser and R. T. Howe, “Surface Micromachined Accelerometer, ”IEEE Journal of Solid-State Circuits, Vol. 31, pp. 366-375, 1996.
[5] N. Yazid, F. Ayazi and K. Najafi, “Micromachined Inertial Sensors”, invited paper, proceedings of the IEEE, vol 86,1998.
[6]徐玉紋, 周元昉, ”微型振動陀螺儀簡介”, 微系統科技協會季刊, 2000, pp.35-43.
[7] M. Kraft, C. Lewis, T. Hesketh and S. Szymkowiak, “A novel
micromachined accelerometer capacitive interface,” Sensors and Actuators A68 ,pp. 466-473, 1998.
[8] F.N. Alavi, M. Kraft and D.O. King, “ Sensitivity analysis of a high performance accelerometer,” Proc. Conf. on Micromechanics Europe, pp. 305-308, 2001.
[9] M.A. LEMKIN et al, “A 3-axis force balanced accelerometer using a single proof-mass,” Solid State Sensors and Actuators, Vol. 2, pp. 1185-1188, 1997.
[10] D. Johns and K. Martin, “Analog Integrated Circuit Design,” John Wiley & Sons, New York, 1997.
[11] B. E. Boser and R. T. Howe, “Surface Micromachined Accelerometer,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 3, 1996.
[12] C.Lu, M. Lemkin and B. E. Boser, “A monolithic surface micromachined accelerometer with digital output,” IEEE Journal of Solid-State Circuits, Vol. 30, 1995.
[13] N. Wongkomet, “Position Sensing for Electrostatic Micropositioners,” Ph. D. Dissertation, University of California at Berkeley, 1998.
[14] Tavakoli, M.; Sarpeshkar, R.” An offset-canceling low-noise lock-in architecture for capacitive sensing” IEEE Journal of Solid-State Circuits, Vol. 38, 2003.
[15] Evans I.,Somerville A. and York T.,`A sensing Circuit For Micro-Capacitance Tomography`,1st World Congress on Industrial Process Tomography,Buxton,Greater Manchester,April 14-17.1999
[16]陳俊成,” 電容式微加速度計系統及感測電路之設計、分析與模擬”, 國立交通大學電機與控制工程所,碩士論文,2001.
[17] Star-HSPICE Manual,Apr.2001.
[18]”Layout Implementation(Virtuoso) Training Manual”CIC lecture,January 2003
[19] Bernhard E. Boser, ”Capacitive Position Sense Circuit”, Berkeley Sensor & Actuator Center, Dept. of Electrical Engineering and Computer Sciences University of California, 1996.
[20] Bernhard E. Boser, ”Electronics for Micromachined Inertial Sensor”, Berkeley Sensor & Actuator Center, Dept. of Electrical Engineering and Computer Sciences University of California, 1997.
[21] Naiyavudhi Wongkomet, ”Position sensing for Electrostatic Micropositioners, Dept. of Electrical Engineering and Computer Sciences University of California,1998.
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