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研究生:陳姿穎
研究生(外文):Tzu-Ying Chen
論文名稱:適用於寬頻無線接取系統之單一載波與正交分頻多工調變雙模態硬體有效利用傳收機
論文名稱(外文):SC-FDE and OFDM Hardware Efficient Dual Mode Transceiver For IEEE 802.16a BWA System
指導教授:汪重光汪重光引用關係
指導教授(外文):Chorng-Kuang Wang
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:英文
論文頁數:171
中文關鍵詞:傳收機單一載波正交分頻多工調變寬頻無線接取系統
外文關鍵詞:SC-FDEIEEE 802.16aOFDMTransceiver
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無線網路在近年來的資訊地球村中扮演了重要的角色,比起有線的光纖網路等,寬頻無線接取系統具有更多的優點。因此,本論文設計並實現了一個適用於無線都會區域網路IEEE 802.16a的基頻傳收機架構。
利用頻域等化器的單一載波調變在效能上具有相當大的潛在優勢。這樣具頻域等化器的單一載波及正交分頻多工調變可經由比較分析進而提出並研究一個結合二者個別優點的雙模態系統。
這個雙模態系統的發射端可以根據不同的傳輸環境及使用者的需求來調整輸出的封包型態。在接收機方面,則可以克服所有在非理想的傳輸環境下所造成的效能降低效應。利用延遲相關器及匹配濾波器可完成信號邊界同步化。此外,一個運用訓練序列特性的載波回復電路被提出,以解決原有相關器所能預測的範圍限制之問題。再者,因為週期前置的長度是可變的,一個自動偵測並移除的機制也被提出於這個雙模態系統中。結合滑動窗和改良式內差器,全數位時序電路亦被實現。除此之外,藉由最小均方誤差等演算法,正交分頻多工的頻域等化器可達成通道預測及信號等化效果,而在另一方面,單一載波的線性及決策回饋式二種頻域等化器也被完成並比較。在快速傅利葉轉換的處理上是採用2/4/8為底的演算法和單路徑延遲回授架構。
這些雙模態傳收機是以硬體共用技術為基礎來設計的。根據選用的不同頻域等化器架構可以達到不同程度的硬體分享,這些硬體有效性的課題也將被探討。最後,利用實現超大型積體電路的硬體描述語言,一個非對稱共存的基頻傳收機被完成。
Among all applications in the global information village, wireless network plays an important role, and broadband wireless access can provide more capacity than its wired broadband counterparts by extending fiber optic networks to the airwaves. Therefore, this thesis proposes the architectures of baseband transceivers comply with IEEE 802.16a of wireless MAN.
The single carrier modulation exploiting the frequency domain equalization makes it a potentially valuable alternate to OFDM. The similarity and the differences between OFDM and SC-FDE are discussed and compared. A dual-mode system combining individual advantages of OFDM and SC-FDE is chosen for investigation and design.
The regulated packet format which is adjustable on different transmission conditions and requirements of users can be delivered by the dual-mode transmitters. The receivers have the capability to overwhelm many kinds of degradations due to non-ideal transmission environments. With the aid of the delay correlator and matched filter, the symbol boundary synchronization can be achieved. Furthermore, a carrier recovery scheme utilizing the characteristics of the preamble is proposed to conquer the limitation of the estimation range for the original correlator. In addition, because of the variable length of the guard interval, an auto-detection and removal mechanism is proposed to both systems. Combining the modified interpolator with a sliding window, an all digital timing recovery scheme is implemented in a non-synchronized sampling way. The frequency domain equalizer for the OFDM system performs the channel estimation and equalization by ZF and LMS algorithms. As to SC system mode, two kinds of frequency domain equalization with linear type and decision feedback type are compared. Furthermore, the FFT module utilizes the algorithm of radix-2/4/8 and the single-path delay feedback architecture.
These circuit designs are based on the technique of hardware sharing. The degree of the efficiency for hardware reuse that depends on the different architectures of frequency domain equalizer for SC will be discussed. Finally, a VLSI coexistent baseband transceiver is implemented.
Abstract i
1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Broadband Wireless Access System Overview . . . . . . . . . . . . . . 5
1.3.1 Cellular Backhaul . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.2 Broadband On-demand . . . . . . . . . . . . . . . . . . . . . . 7
1.3.3 Residential Broadband: Filling the Gaps in Cable and DSL
Coverage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3.4 Underserved Areas . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.5 Best-connected Wireless Service . . . . . . . . . . . . . . . . . 9
1.4 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Wireless MAN System and Background Knowledge 11
2.1 Wireless MAN Overview . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 OFDM Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.2 OFDM Signal Modeling . . . . . . . . . . . . . . . . . . . . . 16
2.2.3 Guard Interval and Cyclic Prefix . . . . . . . . . . . . . . . . . 18
2.3 IEEE 802.16a Standard and Specifications for OFDM Mode . . . . . . 19
2.3.1 Main Parameters . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.2 Preamble Format . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.3 Frequency Allocation and Transmit Spectrum Mask for Wireless
HUMAN . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.4 Adaptive Modulation and Forward Error Correction . . . . . . . 23
2.4 Single Carrier Modulation Principle . . . . . . . . . . . . . . . . . . . 24
2.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.4.2 Single Carrier Modulation with Time Domain Equalization . . . 25
2.4.3 Single Carrier Modulation with Frequency Domain Equalization 27
2.5 IEEE 802.16a Standard and Specifications for SC Mode . . . . . . . . . 28
2.5.1 Main Parameters . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.5.2 Burst Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.5.3 Baseband Pulse Shaping . . . . . . . . . . . . . . . . . . . . . 32
3 Dual Mode System and Channel Model 33
3.1 Two Modulation Types . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.1.1 Orthogonal Frequency Division Multiplexing Modulation . . . 34
3.1.2 Single Carrier Modulation with Frequency Domain Equalization 35
3.2 Comparison between OFDM and SC-FDE . . . . . . . . . . . . . . . . 36
3.3 Coexistence of Single Carrier and OFDM Systems . . . . . . . . . . . 37
3.4 Dual Mode System . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.5 Wireless Channel Characteristics . . . . . . . . . . . . . . . . . . . . . 40
3.5.1 Path Loss (PL) . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.5.2 Multipath Fading . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.5.3 Power Delay Profile (PDP) . . . . . . . . . . . . . . . . . . . . 42
3.5.4 Time Dispersion . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.5.5 Coherence Bandwidth . . . . . . . . . . . . . . . . . . . . . . 44
3.5.6 Doppler Spread . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.5.7 Coherence Time . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.5.8 The Category of the Wireless Channel . . . . . . . . . . . . . . 46
3.6 Outdoor Channel Modeling . . . . . . . . . . . . . . . . . . . . . . . . 48
4 The OFDM and SC-FDE Transmitter Architectures and Design 55
4.1 The OFDM Transmitter Architecture and Design . . . . . . . . . . . . 55
4.2 The SC-FDE Transmitter Architecture and Design . . . . . . . . . . . . 58
4.2.1 Two Kinds of the Guard Interval Designs . . . . . . . . . . . . 58
4.2.2 Transmitter Design for SC-FDE Mode . . . . . . . . . . . . . . 64
4.3 Simulation Environment . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.4 System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.4.1 Analysis of SNR Requirement . . . . . . . . . . . . . . . . . . 68
4.4.2 ADC and DAC Requirements . . . . . . . . . . . . . . . . . . 71
4.4.3 AGC Requirement . . . . . . . . . . . . . . . . . . . . . . . . 72
5 Synchronization Algorithms and Architectures 73
5.1 Out of Synchronization Transmission Effects . . . . . . . . . . . . . . 73
5.1.1 Effects of Symbol Timing Offset . . . . . . . . . . . . . . . . . 73
5.1.2 Effects of Carrier Frequency Offset . . . . . . . . . . . . . . . 75
5.1.3 Effects of Sampling Frequency Offset . . . . . . . . . . . . . . 79
5.2 Synchronization Techniques and Algorithms . . . . . . . . . . . . . . . 82
5.2.1 Synchronization Methods Based on Cyclic Prefix . . . . . . . . 83
5.2.2 Synchronization Methods Based on Training Sequence . . . . . 85
5.2.3 Synchronization Methods Based on Phase Locked Loop . . . . 86
5.3 Packet Detection and Frame Synchronization Design . . . . . . . . . . 88
5.3.1 Delay Correlator . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.3.2 Match Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.4 Carrier Recovery Loop and Architectures . . . . . . . . . . . . . . . . 90
5.4.1 Integer Index Estimation . . . . . . . . . . . . . . . . . . . . . 91
5.4.2 Coarse and Fine Tune of Fractional Index Estimation . . . . . . 94
5.4.3 Tracking Loop . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5.5 Timing Recovery Loop and Architectures . . . . . . . . . . . . . . . . 100
5.5.1 General Timing Recovery Configurations . . . . . . . . . . . . 102
5.5.2 All Digital Timing Recovery . . . . . . . . . . . . . . . . . . . 102
5.5.3 Sampling Frequency Offset Tracking Loop . . . . . . . . . . . 111
6 Equalization and Fast Fourier Transform Design 113
6.1 Channel Effects in Time Domain and Frequency Domain . . . . . . . . 113
6.2 Equalization Algorithms and Architectures for OFDM system . . . . . 114
6.2.1 Channel Estimation . . . . . . . . . . . . . . . . . . . . . . . . 115
6.2.2 Equalizer and Adaptive Algorithms . . . . . . . . . . . . . . . 119
6.3 Equalization Algorithms and Architectures for SC-FDE system . . . . . 123
6.3.1 Overview of Equalization Techniques . . . . . . . . . . . . . . 123
6.3.2 SC-FDE with Linear Equalization . . . . . . . . . . . . . . . . 124
6.3.3 SC-FDE with Decision Feedback Equalization . . . . . . . . . 124
6.4 Guard Interval Detection and Remove . . . . . . . . . . . . . . . . . . 128
6.4.1 Guard Interval Detection . . . . . . . . . . . . . . . . . . . . . 131
6.4.2 Guard Interval Remove . . . . . . . . . . . . . . . . . . . . . . 133
6.5 Fast Fourier Transform Architectures and Circuit Design . . . . . . . . 136
6.5.1 Design Considerations . . . . . . . . . . . . . . . . . . . . . . 136
6.5.2 Pipeline FFT Processor Architecture . . . . . . . . . . . . . . . 136
6.5.3 Radix-2/4/8 Algorithm and Design . . . . . . . . . . . . . . . . 137
6.5.4 Finite-word-length Fixed-point Optimization . . . . . . . . . . 140
7 Hardware Implementation Considerations 143
7.1 Overall Dual Mode Receiver Architecture . . . . . . . . . . . . . . . . 143
7.1.1 Symbol Boundary Synchronization . . . . . . . . . . . . . . . 143
7.1.2 Carrier Frequency Offset Synchronization . . . . . . . . . . . . 145
7.1.3 Sampling Frequency Offset Synchronization . . . . . . . . . . 148
7.1.4 Channel Estimation and Equalization . . . . . . . . . . . . . . 148
7.2 Hardware Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
7.2.1 Overall Dual Mode Transmitter Architecture . . . . . . . . . . 150
7.2.2 Overall Dual Mode Receiver Architecture . . . . . . . . . . . . 152
7.3 Considerations for VLSI Implementation . . . . . . . . . . . . . . . . 154
7.4 Asymmetric and Coexistent of Single Carrier and OFDM Systems . . . 156
7.5 Performance of Bit Error Rate . . . . . . . . . . . . . . . . . . . . . . 156
8 VLSI Implementation 159
8.1 VLSI Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
8.2 VLSI Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
9 Conclusion 165
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