臺灣博碩士論文加值系統

在本論文中，我們設計一雙頻帶(2.4GHz及5.2GHz)的射頻接收機前端電路。其子電路包含了增益可調的雙頻低雜訊放大器、混波器和壓控振盪器，使用台積電 0.18µm CMOS製程參數來設計。由於雙頻接收機需同時接收兩個頻帶的訊號，因此我們使用雙頻同步接收之低雜訊放大器。此外所設計之低雜訊放大器為單端的架構，因此需要一主動的balun以連接到主動雙平衡的混波器。壓控振盪器是設計操作在3.7GHz，透過混波器可將2.4GHz及5.2GHz信號分別降到1.3GHz及1.5GHz之中頻。就2.4GHz而言，此接收機提供了28.5dB的增益及4.8dB的雜訊指數。在5.2GHz時，提供了31dB的增益及4.5dB的雜訊指數。整體的相位雜訊為117dBc/Hz@1MHz，功率消耗為55.4mW。電路是使用安捷倫EEsoft EDA-ADS模擬。

This thesis describes the design and implementation of the front-end circuit of a 2.4/5.2 GHz dualband receiver. The circuit blocks include a gain-controllable concurrent dualband LNA, a mixer and a VCO using TSMC 0.18μm 1P6M CMOS process. Because the dualband receiver receives the two desire signals simultenously, a concurrent dualband LNA is adopted. The proposed LNA is single-ended, and it needs an active balun to connect the LNA to active double-balanced mixer. The designed VCO oscilating at 3.7 GHz, makes the RF signals for 2.4GHz and 5.2GHz downconvert to the first IF of 1.3GHz and 1.5GHz, respectively. For the 2.4GHz band, the front-end circuit for the receiver provides overall gain of 28.5dB and noise figure of 4.8dB. For the 5.2GHz band, the overall gain of the receiver is 31dB, and the overall noise figure is 4.5dB. The phase noise of dualband receiver is 117dBc/Hz@1MHz, and the total power dissipation is 55.4mW.

中文摘要 I
ABSTRACT II
誌謝 III
CONTENTS IV
LIST OF FIGURES VII
LIST OF TABLES XI
CHAPTER 1 INTRODUCTION 1
1.1 Motivation 1
1.2 Organization 2
CHAPTER 2 RECEIVER ARCHITECTURES 3
2.1 Heterodyne Receiver 3
2.2 Superheterodyne Receiver 5
2.3 Homodyne Receiver 6
2.4 Low-IF Receiver 7
2.5 Image-Rejection Receivers 8
2.5.1 Hartley Receiver 8
2.5.2 Weaver Receiver 9
2.6 Dualband Receiver Architecture 10
CHAPTER 3 DUALBAND LOW NOISE AMPLIFIER 13
3.1 Overview 13
3.2 Architecture of CMOS LNA 13
3.2.1 Inductive Source Degeneration 13
3.2.2 Cascode Structure 15
3.3 Noise Analysis 15
3.4 LNA Design 18
3.4.1 CMOS LNA Design Flow 18
3.4.2 CMOS Gain Controllable Concurrent Dual-band LNA 19
3.4.3 Circuit Design 20
3.4.4 Simulation Result 21
3.4.4 Layout 26
CHAPTER 4 MIXER AND VCO 28
4.1 Design of Mixer 28
4.1.1 Mixer Fundamentals 28
4.1.2 Double-Balanced Mixer 31
4.2 Voltage-Controlled Oscillator 37
4.2.1 VCO Fundamentals 38
4.2.2 Design Consideration of VCO 39
4.2.4 Design of VCO 47
CHAPTER 5 IMPLEMENTATION OF RFONT-END RECEIVERS 54
5.1 Active Balun 54
5.2 Dualband Receiver 55
5.2.1 Simulation of Input Frequency at 2.4GHz 55
5.2.2 Simulation of Input Frequency at 5.2GHz 56
CHAPTER 6 CONCLUSIONS AND FUTURE WORKS 58
6.1 Conclusions 58
6.2 Future Work 59

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