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研究生:王祥銘
研究生(外文):Hsiang-Ming Wang
論文名稱:應用於Giga-bit奈米級DRAM的BST高介電薄膜研究
論文名稱(外文):The Study of BST High Dielectric Thin Films for Application on Giga-bit Nano-scaled DRAMs
指導教授:陳世志陳世志引用關係
指導教授(外文):Shih-Chih Chen
學位類別:碩士
校院名稱:國立雲林科技大學
系所名稱:電子與資訊工程研究所碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2004
畢業學年度:92
語文別:中文
論文頁數:129
中文關鍵詞:氧電漿射頻磁控濺鍍介電層鈦酸鍶鋇
外文關鍵詞:Oxygen PlasmadielectricsBarium Strontium TitanateRF Magnetron Sputtering
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  • 下載下載:38
  • 收藏至我的研究室書目清單書目收藏:0
當前製程技術即將推進至奈米階段(即線寬小於100nm的MOSFETs IC與G-bit級的DRAMs),而其中最大的技術瓶頸在於採用適當的高介電薄膜以作為閘極氧化層及MIM電容的介電層,因此本研究將致力於成長高品質的(Ba0.5Sr0.5)TiO3高介電薄膜,研製以BST為介電層的MIM電容元件及以BST薄膜的MIS元件。本研究採用具有加溫(室溫~800°C)與re-sputtering功能的射頻磁控濺鍍系統來成長BST薄膜,從事以下研究內容:
1. 介面層(Interfacial layer)對BST影響之研究:BST和Pt下電極之間有一層10nm的介面層的存在,它的介電常數只有30,不僅會拉低整體的介電常數,同時會增加漏電流,本論文將研究介面層成因及組成,及研究如何抑制介面層的生成。
2. 兩階段電漿處理:擬先長一層15nm的BST,再以氧電漿處理以改善介面層的品質,再接續成長主要的BST薄膜,最後再以氧電槳處理以填補氧空缺,提昇整體BST薄膜的介電特性。
3. 成長後的處理:為改善薄膜品質,降低薄膜內因氧空缺所形成的缺陷,擬採成長後直接以in-situ方式從事O2 plasma,接著以熱退火方式使薄膜再結晶減少氧空缺,以比較研究出最佳之事後的處理方式。
藉由TEM、SIMS、XRD等等量測,分析探討各種成長及處理下的介電薄膜,其介面層的抑制效果,元素縱深分怖及薄膜晶相等等。I-V與C-V量測以探討漏電流機制及界面缺陷密度(Nit)等等。
In the near future, the semiconductor fabrication technologies will push to nanometer scale, such as line width smaller than 100nm for MOSFET IC and Gbit-scaled DRAMs. The high-k thin films will be used as gate oxide of MOSFET and dielectrics of MIM capacitors. In this project, the main investigations will be focused on (Ba0.5Sr0.5)TiO3 for future high-k thin films. The rf magnetic controlled sputtering system is used to grow these dielectrics, it shows heated-substrate and re-sputtering functions. The major study topics are listed as following:
1. Study on the interfacial layer at BST/Pt interface: An interfacial layer is always existed between dielectrics and bottom Pt electrode. And it would degrade the properties of dielectrics. In this project, we will study the formation of interfacial layer.
2. Two-step of plasma treatment: After an ultra thin BST film about 15nm is grown, an O2 plasma treatment is applied on the thin BST film. Then the main BST is grown on the first thin film. Finally, a post-O2 plasma treatment is applied to the BST to reduce the oxygen vacancy in the dielectrics.
3. Post treatments on high dielectrics: For high quality of dielectric thin films, using the post treatments, such as in-situ O2 plasma treatments or FO or FN or RTO or RTN, on the deposited is necessary to reduce the density of oxygen vacancy and crystallize the dielectrics.
Using the TEM, XRD and SIMS analysis the dielectrics grown and treated by various growth conditions and different post treatments. The leakage mechanisms and the trap density at Si/dielectric interfacial will be studied.
目 錄
頁次
中文摘要……………………………………………………………………………….….….i
英文摘要…………………………………………………………………………….….……ii
誌謝…………………………………………………………………………….............……iii
目錄………………………………………………………………………………….……....iv
表目錄……………………………………………………………………………..………..vii
圖目錄…………………………………………………………………………….....……..viii

一、緒論
1-1前 言…………………………………...………………..………...………………..1
1-2研究背景與目的………………………...………………..………...………………..1
1-3 DRAM的發展現況…………………...……………………………………………..2
1-4記憶元的介紹……….…………………………………...…………………………..3
1-5製程技術的改善.……………………………...……………………………………..4
1-6高介電材料之開發.…………………………...……………………………………..8
1-7研究方向..………….…………………………...…………..………………….……11
1-7-1電漿處理(plasma treatment)之研究……………………………………....….11
1-7-2兩段式氧電漿處理(Two-step O2 plasma treatment)之研究…………....……11
1-7-3熱退火(annealing)之研究…………………………………………………… 12
1-7-4 interfacial layer對BST影響之研究……………………….………...………12

二、基本理論及文獻回顧
2-1 基本理論…...………………………………………………………...…..…………13
2-1-1鈦酸鋇的基本性質…….…………………………………………………….13
2-1-2鈦酸鍶的基本性質…….…………………………………………………….13
2-1-3鈦酸鍶鋇(Ba,Sr)TiO3材料的特性…….…………………………………….14
2-1-4 DRAM鐵電材料之特性分析…….………………………………………….15
2-1-5 退火(Annealing)…………………………………………………...………..20
2-1-6射頻濺鍍原理………………………….…………………………….………21
2-1-7 交流式電漿……….…….…………………………………..………...…..…22
2-2 文獻回顧……………………………………..…...…………………………24


三、實驗步驟
3-1 MIM電容結構製作簡介…….…………………………………………………..37
3-1-1 RCA化學清洗…….….……………………………………………………...37
3-1-2高溫成長二氧化矽層……………………………………………….……….38
3-1-3附著層電極及下電極的成長………………………………….…………….38
3-1-4成長薄膜前的化學清洗……………………………………….…………….38
3-1-5成長高介電薄膜……………………………….…………………………….39
3-1-6 O2 和N2O plasma 處理…………………………………………...………40
3-1-7 熱退火處理………………………………………………………………..40
3-1-8 成長上電極………………………………………………………...………..40
3-1-9 蒸鍍罩(shadow Metal Mask)………………………………………………40
3-2電性量測…………………………………………………………………....41
3-2-1 I-V量測………………………………………………………….…..41
3-2-2 C-V量測……….………………………………………………….…41
3-3物性量測……………….………………………………………………..….42
3-3-1 AFM……………………………………………………………..…..42
3-3-2 XRD………………………………………………………………….42
3-3-3 AES…………………………………………………………………..43
3-3-4 SEM………………………………………………………………….43
3-3-5 TEM……………………………………………………………….…44
3-3-6 SIMS……………………………………………………………….…44

四、結果與討論
4-1降低介電層的厚度(d)…….....………………………….……..………..…..49
4-2不同的基板溫度…….....……………………………..…………………….…..…..56
4-3 事後氧電漿處理……………………………………….…………………........…..64
4-4兩階段氧電漿處理-(事前氧電漿處理3分鐘)………………..………..…..73
4-5兩階段氧電漿處理-(事前氧電漿處理5分鐘)...…………….....…………..81
4-6兩階段氧電漿經過不同熱退火溫度處理…….....……………….……..…..89
4-7兩階段氧電漿經過不同的熱退火處理時間………………………….......….96
4-8事前氧電漿處理….....………………………..……………………..…..….104

五、介電可調度
5-1介電可調度……………………………………………………………....……….110

六、結論與未來研究方向
6-1 結論………..……………………………………….…………………..…117
6-2 數據比較………..……………………………………….…………………..…118
6-3 未來研究方向….……..……………………………………………………119
6-3-1 Multi-layer 結構對BST薄膜應用於元件的影響…………….…..………119
6-3-2 BST薄膜成長於MIS結構上……………………..……………………….119
6-3-3 BST薄膜應用在微波通訊上…………….………..……………………….120
6-3-4 BST薄膜應用於電光式數位光開關……………...……………………….120

參考文獻………………………………………………….…………………..……...…...…121
簡歷….………………………………………………….…………………..……...…...…128
參考文獻
[1]R. H. Dennard, "Field effect transistor memory," U. S. Patent 3, 387,286, granted June 4, 1968.
[2]S.Ezhilvalavan, Tseung-Yuen Tseng, “Progress in the developments of (Ba,Sr)TiO3 (BST) thin dilm for Gigabit era DRAMs”, Materials Chemistry and Physics, 65 (2000), pp 227-248.
[3]H. Sunami, T. Kure, N. Hashimoto, K. Itoh, T. Toyabe, and S. Asai, "A corrugated capacitor cell (CCC) for megabit dynamic MOS memories," in EDM Tech. Dig., 1982,p.806.
[4]M.Sakamoto, T.Katoh, H.Abiko, T.Shimizu, H.Mikoshiba, Y.Hokari, K.Hamono, and K. Kobayashi, "Buried storage electrode cell for megabit DRAMs," in IEDAI Tech. Dig., 1985, p. 71 1.
[5]W. F. Richardson, D. M. Bordelon, G. P. Pollack, A. H. Shah, S. D. S. Malhi, H. Shichijo, S. K. Banerjee, M. Elahy, R. H. Womack, C. P. Wang, J. Gallia, H. E. Davis, and P. K. Chatterjee, "A trench transistor cross-point DRAM cell," in IEDM Tech. Dig., 1985, p. 714.
[6]N. Lu, P. Cottrell, W. Craig, S. Dash, D. Critchlow, and R. Mohler, B. Machesney, T. Ning, W. Noble, R. Parent, R. Scheuerlein, E. Sprogis, and L. Tennan, "The SPT cella new substrate plate trench cell for DRAMs," in IEDM Tech. Dig., 1985, p. 77 1.
[7]M. Yanagisawa, K. Nakamura, and M. Kikuchi, "Trench transistor cell with selfaligned contact for megabit MOS DRAM," in IEDM Tech. Dig., 1986, p. 13.
[8]M. Taguchi, S. Ando, N. Higaki, G. Goto, T. Ema, K. Hashimoto, T. Yabu, and T. Nakano, "Dialectically encapsulated trench capacitor cell," in IEDM Tech. Dig., 1986, p. 135.
[9]W. M. Smith, "Vertical one-device memory cell," IBM Technical Disclosure Bulletin, p.3585,1973.
[10]M. Koyanagi, H. Sunami, N. Hashimoto, and M. Ashikawa, "Novel high density stacked capacitor MOS RAM," in IEDM Tech. Dig., 1978, p. 348.
[11]M. Koyanagi, Y. Sakai, M. Ishihara, M. Tazunoki, and N. Hashimoto, "A 5V only 16kb stacked capacitor MOS RAM," IEEE Journal of Solid State Circuits, vol. 15, p. 661,1980.
[12]Y. Takemae, T. Ema, M. Nakano, F. Baba, T. Yabu, K. Miyasaka, and K. Shirai, "A IMb DRAM with 3-dimensional stacked capacitor cells," in ISSCC Dig. Papers, 1985,p.250.
[13]H. Shinriki, T. Kisu, S. 1. Kimura, Y. Nishioka, Y. Kawamoto, and K. Mukai, "Promising storage capacitor structures with thin Ta2O5 film for low-power highdensity DRAM''s," IEEE Trans. Electron Devices, vol. 37, p. 1939, 1990.
[14]K. Itoh, "Trends in megabit in DRAM circuit design," IEEE Journal of Solid State Circuits, vol. 25, p. 778, 1990.
[15]G. Bronner, "DRAM technology trends for 256Mb and beyond," in International Electron Devices and Materials Symposium, Hsinchu, 1996, p. 75.
[16]劉台徽 ”Giga bit DRAM 世代的High-k材料的最新技術動向”, 電子月刊, 7卷, 9期, p166.
[17]彭成鑑 〝強介電陶瓷材料在動態隨機記憶體上的應用〞, 工業材料, 107期, P72, 民84.
[18]汪建明,1999,"Ceramic techonlogy handbook",中華民國產業科技發展協進會,中華名國粉末治金協會,頁403-430,六月。
[19]鄭晃忠,1999,"極大型積體電路之鐵電材料",電子月刊,第五卷第六期,頁94-103,六月。
[20]邱碧秀,1996,電子陶瓷材料,科學圖書大庫,徐氏基金會,台北。
[21]魏炯權,1993,電工材料,全華,台北。
[22]莊達人,“VLSI製造技術”,高立圖書,1995。
[23]傅勝利,1995,電子材料,再版,全華,台北。
[24]S. M. Sze, 1988, VLSI Technology, McGraw Hill.
[25]Koyama, et al., Proceeding of 3rd Symposium on plasma, ECS, Vol. 82-6.
[26]F.Jansen, 1990 ,“AVS Short Course: PECVD”, American Vacuum Society.
[27]Matsuda et al., 1984 , Japanese Journal of Applied Physics, Vol. 23, L 567.
[28]Deok-Sin Kil, Byung-Il Lee, Seung-Kj Joo, “Effect of deposition conditions of buffer layer on the characteristics of (Ba,Sr)TiO3 thin films fabricated by a self-buffering process”, Thin Solid Film, 1999, 343-344, pp 453-456.
[29]Hag-Ju Cho, Sejun Oh, Chang Seok Kang, “Improvement of leakage current characteristics of Ba0.5Sr0.5TiO3 films by N2O plasma surface treatment”, Appl. Phys. Lett., 1997, Vol. 71, No. 22, 1, pp 3221-3223.
[30]Di Wu , Aidong Li , Zhiguo Liu , Huiqin Ling , Chuan Zhen Ge , Xiaoyong Liu , Hong Wang , Min Wang , Peng Lii , Naiben Ming ,” Fabrication and electrical properties of sol-gel derived (Ba,Sr)TiO3 thin films with metallic LaNO3 electrode “, Thin Soild Films , 336(1998) , 172.
[31]Cheol Seong Hwang, Suk Ho Joo, “Variations of the leakage current density and the dielectric constant of Pt/(Ba,Sr)TiO3/Pt capacitors by annealing under a N2 atmosphere”, Journal of Applied Physics, 1999, Vol. 85, No. 4, pp 2431-2436.
[32]Zhiqiang Wei, Huping Xu, Minoru Noda, Masanori Okuyama, "Preparation of BaxSr1-xTiO3 thin films with seeding layer by a sol-gel method, " Journal of Crystal Growth 237-239, 2002, p443-447.
[33]Jaemo Im, O. Auciello, S.K. Streiffer, "Layered (BaxSr1-x)Ti1+yO3+z thin films for high frequency tunable devices, " Thin Solid Films 413, 2002, p243-247.
[34]汪建民,“材料分析”,中國材料科學學會,1998。
[35]謝詠芬,“穿透式電子顯微鏡分析技術在積體電路製造上的應用”,科儀新知第十七卷第三期,p.12-p.28。
[36]Cheol Seong Hwang, et al. “Depletion layer thickness and Schottky type carrier injection at the interface between Pt electrodes and (Ba, Sr)TiO3 thin films”, J. Appl. Phys. ,Vol. 85, Number 1 ,1999, p.287-p.295
[37]P. C. Joshi and M. W. Cole “Influence of post-deposition annealing on the enhanced structural and electrical properties of amorphous and crystalline Ta2O5 thin films for dynamic random access memory applications”, Journal of Applied Physics ,1999 Volume 86, Issue 2, p.871-p.880
[38]L.C.Sengupta, S.Sengupta, IEEE Trans. Ultrasonics Ferroelectr.Fr equency Control 44 (1997) 792.
[39]K.M. Johnson, J.Appl.Phys. 33 (1962) 2826.F.W. Van Keuls, R.R. Romanofsky, N.D. Varalijay, F.A. Miranda,C.L. Candey, S. Aggarwal, T. Venkatesan, R. Ramesh, Microwave Opt.T echnol. Lett. 20 (1999) 53.
[40]F.A. Miranda, R. Romanofsky, F.W. Van Keuls, C.H. Mueller,R.E.T reece, T.E.Rivkin, Integr.Ferr oelectr. 17 (1998) 231.
[41]J.M. Ponds, S.W. Kirchoeffer, W. Chang, J.S. Horwitz, D.B.Chrisey, Integr.Ferr oelectr. 22 (1998) 317.
[42]W.J. Kim, W. Chang, S.B. Qadri, J.M. Pond, S.W. Kirchoefer,J.S. Horwitz, D.B. Chrisey, Appl. Phys. A 70 (2000) 313.
[43]C.M. Carlson, T.V. Rivkin, P.A. Parilla, J.D. Perkins, D.S.Ginley, A.B. Kozyrev, V.N. Oshadchy, A.S. Pavlov, Appl. Phys.Lett.76 (2000) 1920.
[44]W. Chang, J.S. Horwitz, A.C. Carter, J.M. Pond, S.W. Kirchoefer,C.M. Gillmore, D.B. Chrisey, Appl.Phys.Lett.74 (1999)1033.
[45]J.C.Slater , Phys.Rev . 78 (1950) 748.
[46]Q.X. Jia, J.R. Groves, P. Arendt, Y. Fan, A.T. Findikoglu, S.R.Foltyn, H. Jiang, F.A.Miranda, Appl.Phys. Lett.74 (1999)1564.
[47]P.C. Joshi, M.W. Cole, Appl. Phys. Lett. 77 (2000) 289.
[48]F.W. Van Keuls, R.R. Romanofsky, N.D. Varalijay, F.A. Miranda,C.L. Candey, S. Aggarwal, T. Venkatesan, R. Ramesh,Microwave Opt.T echnol. Lett. 20 (1999) 53.
[49]Chung Ming Chu and Pang Lin, "Electrical properties crystal structure of (Ba, Sr)TiO3 films prepared at low temperatures on a LaNiO3 electrode by radio-frequency magnetron sputtering", Appl. Phys. Lett., vol. 70, p. 249, 1997.
[50]Ching-Chich Leu, Shih-Hsiung Chan, Haur-Ywh Chen, “Effects of O2 plasma treatment on the electric and dielectric characteristics of Ba0.7Sr0.3TiO3 thin films”, Microelectronics Reliability, 2000, 40, pp 679-682.
[51]R.H. Horng, D.S. Wuu, C.C. Leu, “Effects of fluorine-implanted treatment on Ba0.7Sr0.3TiO3 films”, Microelectronics Reliability, 2000, 40, pp 667-670.
[52]R.H. Horng, D.S. Wuu, C.C. Leu, “Ion-implanted treatment of (Ba,Sr)TiO3 films for DRAM applications”, Journal of Non-Crystalline Solids, 2001, 280, pp 48-53.
[53]San-Yuan Chen, Hong-Wen Wang, Li-Chi Huang, "Role of an intermediate phase (Ba,Sr)2Ti2O5CO3 in doped (Ba0.7Sr0.3)TiO3 thin films," Materials Chemistry and Physics 77, 2002, P632-638.
[54]姚俊敏, ”閘極氧化層製程發展新趨勢”, 電子月刊, 第八卷第九期, p. 142-154, 民91.
[55]P.C. Joshi, S. Ramanathan, S.B. Desu, S. Stowell, S. Senqupta, “ Characterization of Ba0.6Sr0.4TiO3 thin films with Mg additive fabricated by metalorganic decomposition technique “, Integrated Ferroelectrics , 19(1998) , 141.
[56]San-Yuan CHEN, Hong-Wen WANG and Li-Chi HUANG , “ Electrical Properties of Mg/La , Mg/Nb Co-Doped (Ba0.7Sr0.3)TiO3 Thin Films Prepared by Metallo-Organic Deposition Method “, Jpn. J. Appl. Phys., 40 (2001) , 63.
[57]呂琪瑋, 曾俊元, “ 鈦酸鍶鋇薄膜在微波通訊的應用“, 電子月刊, 6 (2000) , 146.
[58]J. Synowczynski, L. C. Sengupta, and L.H. Chiu, “”,Integrated Ferroelectrics , 22 (1998) , 341.
[59]M.W. Cole, P.C. Joshi, M.H. Ervin, M.C. Wood, R.L. Pfeffer, “ The influence of Mg doping on the materials properties of Ba1-xSrxTiO3 thin films for tunable device applications “, Thin Solid Films , 374 (2000) , 34.
[60]Young-Ah JEON, Tae-Suck SEO and Soon-Gil YOON, Effect of Ni Doping on Improvement of the Tunability and Dielectric Loss of Ba0.5Sr0.5TiO3 Thin Films for Microwave Tunable Devices “, Jpn. J. Appl. Phys., 40 (2001) , 6496.
[61]C.-J. Peng, S.B. Krupanidhi, “Process/Structure/Property Relations of Barium Strontium Titanate Thin Films Deposited by Multi-Ion-Beam Sputtering Technique”, Applications of Ferroelectrics, 1994.ISAF ''94., Proceedings of the Ninth IEEE International Symposium, IEEE, 460(1995).
[62]D.C. Yoo, J.Y. Lee, “Effect of post-annealing on the interface microstructure of (Ba,Sr)TiO3 thin films”, Journal of Crystal Growth, 224(3-4), 251(2001).
[63]E. Ngo, P. C. Joshi, M. W. Cole, C. W. Hubbard, “Electrophoretic deposition of pure and MgO-modified Ba0.6Sr0.4TiO3 thick films for tunable microwave devices”, Applied Physics Letters, 79(2), 248(2001).
[64]L. Goux, M. Gervais, A. Catherinot, C. Champeaux, F. Sabary, “Crystalline and electrical properties of pulsed laser deposited BST on platinized silicon substrates”, Journal of Non-Crystalline Solids, 303(1), 194(2002).
[65]E. Ngo, P. C. Joshi, M. W. Cole, C. W. Hubbard, “Electrophoretic deposition of pure and MgO-modified Ba0.6Sr0.4TiO3 thick films for tunable microwave devices”, Applied Physics Letters, 79(2), 248(2001).
[66]J. Im, O. Auciello, S. K. Streiffer, “Layered (BaxSr1-x)Ti1+yO3 thin films for high frequency tunable device”, Thin Solid Films, 413(1-2), 243(2002).
[67]Shih-Chih Chen, Yun-Ta Tsai, Hsiang-Ming Wang, Liang-Tsai Su, “Using the Two-step O2 Plasma Method to Improve on the Electrical Properties of (Ba0.5Sr0.5)TiO3 Thin Films by RF Magnetron Sputtering at Low Temperature”, EDMS2003, p38-41.
[68]Shih-Chih Chen, Yun-Ta Tsai, Hsiang-Ming Wang, Liang-Tsai Su, “Dielectric tunability of. (Ba0.5Sr0.5)TiO3 thin films by RF sputering”, EDMS2003, p674-677.
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