|
[1] N. AbouGhazaleh, B. Childers, D. Moss, R. Melhem, and Matthew Craven. Energy management for real-time embedded applications with compiler sup- port. ACM SIGPLAN Languages, Compilers,and Tools for Embedded Sys- tems, 2003. [2] N. AbouGhazaleh, D. Moss, B. Childers, R. Melhem, and Matthew Craven. Collaborative operating system and compiler power management for real- time applications. IEEE Real-Time Embedded Technology and Applications Symposium, 2003. [3] A. Azevedo, I. Issenin, and R. Cornea. Pro¯le-based dynamic voltage schedul- ing using program checkpoints. In: Carlos K, ed. Proc. of the Conf. on Design, Automation and Test in Europe. Washington: IEEE Computer Society Press, pages 1{8, 2002. [4] Stanford Compiler Group. The SUIF Compiler Infrastructure. Stanford Com- piler Group, Stanford, March 1995. [5] C.H. Hsu, M. Hsiao, and U. Kremer. Compiler-directed dynamic frequency and voltage scheduling. In Workshop on Power-Aware Computer Systems, November 2000. [6] Chung-Hsing Hsu, Ulrich Kremer, and Michael S. Hsiao. Compiler-directed dynamic voltage/frequency scheduling for energy reduction in mircoproces- sors. International Symposium on Low Power Electronics and Design 2001, pages 275{278, 2001. [7] Intel, inc. Intel Pentium M Processor. http://www.intel.com/products/ pro- cessor/pentiumm. [8] Intel, inc. Intel XScale Technology. http://www.intel.com/design/intelxscale. [9] C.M. Krishna and Y.-H. Lee. Voltage-clock-scaling adaptive scheduling tech- niques for low power in hard real-time systems. In Proceedings of the 6th Real Time Technology and Applications Symposium (RTAS 00), May 2000. [10] A. Manzak and C. Chakrabarti. Variable voltage task scheduling for minimiz- ing energy or minimizing power. In Proceeding of the International Conference on Acoustics, Speech and Signal Processing, June 2000. [11] T. Pering, T. Burd, and R. Brodersen. Dynamic Voltage Scaling and the Design of a Low-Power Microprocessor System. In Power Driven Microarchi- tecture Workshop, attached to ISCA98, June 1998. [12] P.Pillai and K. G. Shin. Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems. In Proceedings of the 18th ACM Symposium on Operating Systems Principles, pages 89{102, October 2001. [13] D. Shin and J. Kim. Intra-task voltage scheduling on dvs-enabled hard real- time systems. IEEE Design and Test of Computers, March 2001. [14] D. Shin and J. Kim. A pro¯le-based energy-e±cient intra-task voltage schedul- ing algorithm for real-time applications. International Symposium on Low Power Electronics and Design, pages 271{274, 2001. [15] Y. Shin, K. Choi, and T. Sakurai. Power Optimization of Real-Time Embed- ded Systems on Variable Speed Processors. In Proceedings of the International Conference on Computer-Aided Design, pages 365{368, November 2000. [16] Michael D. Smith. Machine SUIF Compiler. Division of of Engineering and Applied Science, Harvard University, March 1998. [17] Transmeta, inc. Crusoe Processor Technology. http://www.transmeta.com/ crusoe/index.html.
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