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研究生:彭雨凡
研究生(外文):Yu-Fan Peng
論文名稱:一個使用嵌入式系統實現數位細胞式類神經網路的方法
論文名稱(外文):Implementation of Digital Cellular Neural Networks with Embedded System
指導教授:余松年余松年引用關係
學位類別:碩士
校院名稱:國立中正大學
系所名稱:電機工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:中文
論文頁數:76
中文關鍵詞:嵌入式系統細胞式類神經網路
外文關鍵詞:CNNFPGA
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現階段細胞式類神經網路(Cellular Neural Networks, CNN)所應用的領域常需要用到大型模板,但傳統的CNN受限於硬體架構不易實現大型模板,因此本論文主要提出模板分解的方法,並以硬體來加速處理程序再配合嵌入式系統使系統弁鄑韞[完備,最後的影像結果會與直接使用大型模板進行影像處理的結果進行比較。
大型模板分解分為三部分:模板分解、模板結合與積分運算。利用模板分解的部分將大型模板分解成數個小型3×3模板,再透過模板結合將分解過的小型模板的結果相結合,最後經由積分運算與輸出函數的結果則與大型模板相同。本架構並不侷限於3×3、5×5或9×9的模板,對於應用不同大小模板時仍可輕易的調整分解方式達到重複使用的特性;此外本架構從黑白影像至灰階影像皆可適用。
本研究使用Xilinx所生產的FPGA來驗證我們所提的電路弁遄A實驗結果顯示所使用的硬體面積相當小,而且也提升了CNN運用在模板分解的運算速度。在影像處理的精確度方面,實驗結果顯示若有足夠的位元數則分解的影像與直接用大型模板處理的結果會完全相同,有此可以證明我們可以使用模板分解來取代大型模板。此外在設計模組的同時我們遵守Reuse Methodology Manual的規範並通過nLint的coding style之驗證,因此更突顯出本論文提出的方法架構不僅具有原來使用大模板CNN的弁遄A更加入矽智產的概念,兼具電路弁鉬P提供重複使用的雙重優點。
In the realm of Cellular Neural Networks (CNNs) design, large-neighborhood templates are usually needed. However, most traditional CNNs are usually limited by the hardware structure that only 3×3 templates are supported, which makes the implementation of large neighborhood templates difficult on regular CNN universal machines. The main objective of this thesis is to propose a novel template decomposition method for large-neighborhood templates. This method is implemented on hardware to accelerate the processing procedure and is finally incorporated into an embedded system to make a complete system.
The procedures of large-neighborhood template decomposition are divided into three steps: template decomposition, template synthesis, and integral operation. In the template decomposition, we decompose a large–neighborhood template into several small 3×3 templates. Then we combine the results of these small 3×3 templates in the template synthesis step. Finally, after the integral operation and the output function, the result will be the same as that without template decomposition. The proposed structure is not limited to 3×3, 5×5 or 9×9 templates and can be easily implemented on template of any size. Moreover, this structure can be applied to both black-and-white and gray-level images.
We used the FPGA board developed by Xilinx to test the function of the proposed method. The experimental results show that the proposed method requires very small hardware area while impressively raising the operation speed in the template decomposition procedures. The error due to word length effect is small. With sufficiently large word length, the results using the proposed template decomposition method are exactly the same as that using the traditional large neighborhood method. Therefore, we can conclude that the proposed method can replace the large neighborhood method. Moreover, we obey the Reuse Methodology Manual and passed the circuit through nLint coding style verification. In the consequence, the proposed hardware circuit possesses both the function and the reusability requirement of the intelligent property (IP).
摘要 ………………………………………………………………… Ⅰ
目錄 ………………………………………………………………… Ⅱ
第一章 緒論 - 1 -
1.1 研究背景與動機 - 1 -
1.2 研究目的 - 3 -
1.3 論文架構 - 3 -
第二章 相關文獻回顧 - 4 -
2.1 細胞式類神經網路 - 4 -
2.1.1 細胞式類神經網路架構 - 4 -
2.1.2 離散細胞式類神經網路 - 6 -
2.2 細胞式類神經網路硬體實現 - 7 -
2.3 大型模板分解 - 10 -
2.3.1 Slot模板拆解理論 - 11 -
2.3.2 模板拆解之改良 - 12 -
2.3.3 近年來對模板分之研究 - 12 -
第三章 大型模板分解在FPGA的實現 - 14 -
3.1 理論推導 - 15 -
3.1.1 大型模板拆解 - 15 -
3.2 硬體架構 - 21 -
3.2.1模板分解 - 22 -
3.2.2 模板結合 - 27 -
3.3 模擬驗證 - 30 -
第四章 嵌入式系統 - 35 -
4.1 嵌入式系統簡介 - 35 -
4.2 多媒體發展板 - 36 -
4.2.1 CompactFlashTM裝置 - 36 -
4.3 嵌入式系統 - 37 -
4.3.1 MicroBlaze中央處理器 - 39 -
4.3.2 記憶體位置規劃用 - 40 -
4.3.3 匯流排介面 - 40 -
4.4 DTCNN用於影像處理 - 42 -
第五章 實驗結果與討論 - 46 -
5.1硬體合成 - 46 -
5.2嵌入式系統實現 - 50 -
5.3影像測試結果 - 51 -
5.4 矽智產驗證 - 63 -
第六章 結論 - 66 -
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