|
[1] “Universal Serial Bus Specification Revision 2.0”. [2] 元件科技雜誌2004年2月號內文 [3] M.-J.Edward Lee, Willia J. Dally , Ramin Farjad-Rad, Hiok-Tiaq Ng, Ranesh Senthinathan, John Edmondson, and John Poulton,”CMOS High-Speed I/O Present and Future”,International Conference on Computer Design,2003 IEEE. [4] Ramin Farjad-Rad, Member, IEEE,William Dally, Fellow,IEEE,Hiok-Tiaq Ng, Member, IEEE,Ramesh Senthinathan,M.-J.Edward Lee, Rohit Rathi, and John Poulton, Senior Member, IEEE,”A Low-Power Multiplying DLL For Low-Jitter Multigigahertz Clock Generation in Highly Integrated Digital Chip”, IEEE. [5] 新電子科技2004年五月 [6] J,Solid-State,Circuits,Vol.37,No.12,December 2002. Chih-Kong Ken Yang, Ramin Farjad-Rad and Mrk A. Horowitz, “A 0.5um CMOS 4.0-Gbit/s Serial Link Transceiver with Data Recovery Using Oversampling,” IEEE J. Solid-State Circuits, Vol. 33, No. 5, May 1998,P713-P722. [7] Jaeha Kim and Deog-Kyoon Jeong,Seoul National University, “Multi-Gigabit Rate Clock and Data Recovery Based on Blind Oversampling,” IEEE Communications Magazine,December 2003. [8] Yen-Hung,”Module Generator of Data Recovery Circuits Using Oversampling Technique” [9] Youngdon Choi, Deog-Kyoon Jeong and Wonchan Kim, ”Jitter Transfer Analysis of Tracked Oversampling Techniques for Multigigabit Clock and Data Recovery,” IEEE Transaction On Circuits and Systems, Vol. 50, No. 11, November 2003 ,P775-P783. [10] Shyh-Jye Jou, Shu-Hua Kuo, Jui-Ta Chiu, Chu King, and Tim Liu, “A Serial Link Transceiver for USB2 High-Speed Mode,” 2001 IEEE,P72-P75. [11] 陳雅玲,“Transmission Quality Analysis of Universal Serial Bus(USB)”. [12] 呂坤庭,“Transmission Quality Analysis for High Performance Serial Bus,IEEE 1394-1995”.
|