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研究生:洪秋韻
研究生(外文):Chiu-Yun Hung
論文名稱:單晶片系統匯流排介面的驗證平台
論文名稱(外文):A Verification Platform for SoC Bus Interface
指導教授:王益文王益文引用關係
指導教授(外文):Yi-Wen Wang
學位類別:碩士
校院名稱:逢甲大學
系所名稱:資訊工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:中文
論文頁數:57
中文關鍵詞:正規化驗證AHB匯流排PCI
外文關鍵詞:AHBFormal verificationBUSPCI
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由於單晶片系統與矽智產硬體設計的先進,使得在匯流排介面協定順從性的驗證,於專案的成功與否扮演越來越重要的角色。在本論文中,我們針對單晶片匯流排介面,利用視覺化Tcl/Tk語言於linux環境裡將模型檢查正規化驗證工具VIS和週期模擬驗證工具Specman Elite整合在同一驗證平台上
並以PCI/AHB匯流排橋接器的例子來實驗平台的可行性。PCI/AHB匯流排橋接器用Verilog或是VHDL來表示。VIS用來支援公平性CTL模型檢查與語言無涵義檢查。Specman Elite用來支援功能性測試與資料時序性檢查。PCI/AHB匯流排橋接器有三個實作上的錯誤於Specman Elite中發現。
The advance of the system-on-chip(SoC)design paradigms makes the verification of bus interface protocol compliance increasingly important to the success of a SoC project. In this thesis, a verification platform is established by using visual Tcl/Tk in the Linux environment to integrate a cycle-accurate simulation-based verification tool, Specman Elite, and a model checking formal tool, VIS, for SoC bus interface verification.
A PCI/AHB bus bridge is used as an example to demonstrate the feasibility of the proposed verification platform. The design of the PCI/AHB bus bridge is represented in Verilog/VHDL. VIS is utilized to support fair CTL model checking and language emptiness checking. Specman Elite is used to support automatic generation of functional tests and data temporal checking. Three implementation errors in the PCI/AHB bridge have been found by Specman Elite.
致謝 i
摘 要 ii
Abstract iii
目 錄 iv
圖目錄 v
第一章 簡介 1
第二章 背景 3
2.1 模擬 4
2.2 正規化驗證 4
2.3單晶片系統匯流排介面 9
第三章 驗證平台 23
3.1 驗證方法的流程 23
3.2 VIS 25
3.3 Specman Elite 31
第四章 實驗結果 41
4.1 驗證平台 41
4.2 ARM高效能匯流排 41
4.3 PCI匯流排控制器 43
第五章 結論 48
參考文獻 49
[1] VSI Alliance, Virtual Component Interface (VCI) Standard - OCB 2 1.0, URL: http://www.vsia.org, Mar. 2000.
[2] K. Shimuzu, D. L. Dill, and A. J. Hu, “Monitor-Based Formal Specification of PCI,” in Proc. 3th Int. Conf. Formal Methods in Computer-Aided Design, pp. 335-353, Nov. 2000.
[3] M. T. Oliviera and A. J. Hu, “High-Level Specification and Automatic Generation of IP Interface Monitors,” in Proc. 39th Design Automation Conf., pp. 129-134, June 2002.
[4] A. J. Hu, J. Casus, and J. Yang, “Efficient Generation of Monitor Circuits for GSTE Assertion Graphs,” in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, pp. 154-159, Nov. 2003.
[5] J. Yuan, K. Shultz, C. Pixley, H. Miller, and A. Aziz, “Modeling Design Constraints and Biasing in Simulation Using BDDs,” in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, pp. 584-589, Nov. 1999.
[6] K. Shimizu and D. L. Dill, “Deriving a Simulation Input Generator and a Coverage Metric From a Formal Specification,” in Proc. 39th Design Automation Conf., pp. 801-806, June 2002.
[7] A. Nightingale and J. Goodenough, “Testing for AMBA Compliance,” in Proc. 14th IEEE Int. ASIC/SOC Conf., pp. 301-305, Sept. 2001.
[8] H. M. Lin, C. C. Yen, C. H. Shih, and J. Y. Jou, “On Compliance Test of On-Chip Bus for SOC,” in Proc. Asia and South Pacific Design Automation Conf., pp. 328-333, Jan. 2004.
[9] P. Chauhan, E. M. Clarke, Y. Lu and D. Wang, “Verifying IP-Core based System-On-Chip Designs,” in Proc. 12th IEEE Int. ASIC/SOC Conf., pp. 27-31, Sept. 1999.
[10] I. Beer, B. D. Shoham, C. Eisner, Y. Engel, R. Gewitzman and A. Landver,“Establishing PCI Compliance Using Formal Verification: A Case Study,” in Proc. 14th Int. Phoenix Conf. on Computation and Communications, pp. 373-377, Mar. 1995.
[11] A. Roychoudhury, T. Mitra, and S.R. Karri,”Using formal techniques to Debug the AMBA System-on-Chip Bus Protocol,” in Proc. Design Automation and Test in Europe Conf., pp. 828- 833, 2003.
[12] Property Specification Language URL: http://www.eda.org/vfv/docs/psl_lrm-1.01.pdf/
[13] Open Verification Library URL: http://www.verificationlib.org/.
[14] OpenVera URL: http://www.opervera.org/.
[15] SystemVerilog URL: http://www.systemverilog.org/.
[16] Hardware Verification Group URL: http://hvg.ece.concordia.ca/
[17] T. Shanley and D. Anderson, PCI System Architecture, 4th Edition, Addison-Wesley Pub Co, 1999.
[18] T. Shanley, K. Gettman, PCI-X System Architecture, Addison-Wesley Pub Co, 2001.
[19] E. Solari, PCI and PCI-X Hardware and Software, 5th Edition, Annabooks, 2000.
[20] PCI & AGP URL: http://members.hyperlink.net.au/~chart/pci.htm
[21] PC-Guides URL: http://www.pcguide.com/ref/mbsys/buses/types/pci.htm
[22] PCI BUS Info URL: http://www.neurophys.wisc.edu/comp/pci.html
[23] AMBA AHB Specification URL: http://www.arm.com/armtech.nsf/html/AMBA?OpenDocument&style=AMBA
[24] VIS URL: http://www-cad.eecs.berkeley.edu./~vis
[25] Specman Elite URL: http://www.verisity.com/products/specman.html
[26] Tcl/Tk URL: http://www.tcl.tk/software/tcltk
[27] Visual Tcl URL: http://vtcl.sourceforge.net
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