臺灣博碩士論文加值系統

本文旨在利用網版印刷方式製做鋯鈦酸鉛多層厚膜與矽晶片薄板做結合，製出具備低驅動電壓高d33值之致動器，作為推動適應鏡片使用。
本文研製使用可低溫燒結緻密的壓電粉末，利用三軸滾輪調漿搭配網板印刷將壓電漿料網印於基材上，並由實驗得到最佳燒結溫度。經試用多種阻障層以降低壓電材與基材間的元素擴散，氧化鋯為較佳的選擇，成功網印於矽晶片，具備成本低、重複率高等優點，所得之試片壓電性亦有明顯的提升。
為製作具備更高致動能力、低驅動電壓的壓電致動器，利用刮刀成形方式製作40 微米壓電生胚，進行5, 9及13 層堆疊燒結之壓電體，施壓0至30伏特可得0 至0.5微米之線性位移量，足以提供可見光之適應鏡片使用。另膠合至銅基板上，量測個別之電性與觀察彼此位移量與驅動電壓之關係。

The major objective of this thesis is to combine multilayer thick film pzt(Lead Zirconate Titanate) with silicon substrate through screen printing method, thereby producing actuator with high d33 coefficient and low driving voltage to actuate adaptive mirror.

In the experiment, we used the piezoelectric particle with 3-axis rolling to get slurry and screened printing it on the silicon to obtain the best sintering temperature. We had tried many kinds of buffer layer in order to avoid lowering piezoelectricity caused by material diffusion. We selected zirconium to 3-axis rolling and successfully screen printing on the silicon, resulting in low cost, high repetition and much higher piezoelectricity.

In order to manufacture pzt actuator with much higher actuating ability and lower driving voltage, we also used tape casting to carry on many layer stacks and sinter individually. When applying driving voltage between zero and thirty, we can get the linear displacement between zero and half micro meter to drive adaptive mirror. Finally, we combine multilayer pzt with copper to measure individual piezoelectricity and the interaction between the displacement and the applied voltage.

誌 謝 I
摘要 I
ABSTRACT II
目錄 III
表錄 VI
圖錄 IX
符號表 XII
第一章 緒論 1
1.1 壓電材料簡介 1
1.2 研究背景與動機 2
1.3 文獻回顧 6
第二章 壓電原理 9
2.1 壓電效應 9
2.2 正壓電效應與逆壓電效應 10
2.3 壓電、焦電、鐵電效應 12
2.4壓電方程式 13
2.5磁滯效應(HYSTERESIS) 16
第三章 壓電厚膜製程與應用 17
3.1 壓電粉末製作流程 17
3.2 壓電圓片製作流程 22
3.3 電性量測與顯微結構觀察設備 25
3.3.1 電性量測相關 25
3.3.2 顯微結構觀察設備 26
3.4 PND-1Y與PND-1N圓片電性 27
3.5壓電生胚片壓附矽晶片上燒結及電性量測 29
3.5.1 基底切割與清潔準備 29
3.5.2 壓電生胚片壓附矽晶結合共燒與電性量測 30
3.6 壓電漿料結合矽晶基底 31
3.6.1 壓電漿料調配 31
3.6.2 壓電漿料結合矽晶基底共燒流程 33
3.7壓電漿料刷附矽晶片之製程 37
3.7.1 PND-CH壓電圓片製作與特性 37
3.7.2 PND-CH壓電漿料結合矽晶基底共燒電性 39
3.8壓電漿料刷附矽晶片之製程 40
3.8.1 壓電厚膜與ZrO2網印於矽晶基版上之流程 40
第四章 積層體與其結合銅基版電性量測與位移行為 43
4.1粉末混料與刮刀成形 43
4.1.1 單層胚片相關電性 44
4.1.2 積層體製作 45
4.1.3 積層體與其結合銅片基板後電性 48
4.2積層體結合銅基版位移量測 56
4.2.1 Polytec 都卜勒雷射干涉儀量測設備 56
4.3位移量測結果 58
第五章 結論 85
5.1 結果與討論 85
參考文獻 86
個人簡歷 89

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