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研究生:蘇迺超
研究生(外文):Nai-Chao Su
論文名稱:以氮化鋁薄膜作為電容器與場效電晶體閘極絕緣層之製作與電性分析
論文名稱(外文):The Fabrication and Characterization of Aluminium Nitride Gate Insulator Capacitors and Field-Effect Transistors
指導教授:王水進
指導教授(外文):Shui-Jinn Wang
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:中文
論文頁數:80
中文關鍵詞:高介電係數氮化鋁金氧半場效電晶體電容磁控賤鍍
外文關鍵詞:high-kmagnetron sputtercapacitorAlNMOSFET
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摘 要
為了提升積體電路元件的速度和性能,元件的尺寸必須不斷地的微縮以增加積集度,如今傳統的MOS元件即將要面臨物理極限,因為閘極氧化層所使用的二氧化矽厚度已低到只有數個原子層的範圍,此情況下因直接穿隧效應所造成之閘極漏電流密度急遽增大,除將造成必v消耗過大外,甚將使元件失效。目前尋找合適的高介電係數材料以替代二氧化矽作為閘極氧化層乃成為解決此問題的重要途徑之一。
本論文旨在以射頻磁控濺鍍方式成長氮化鋁薄膜以取代二氧化矽作為閘極絕緣層,進行電容及場效電晶體製作及量測分析。我們利用了X-光繞射分析(XRD)、化學分析電子儀(ESCA)、歐傑電子分析儀(AES)以及能量分散光譜儀(EDS)確認濺鍍所得薄膜材料成份為氮化鋁。由SEM與TEM的橫截面照片發現界面良好,而TEM的影像同時也用來擷取氮化鋁薄膜的實際厚度。我們嘗試了不同的濺鍍條件來估算氮化鋁薄膜的介電常數值。由C-V量測和TEM的影像計算的結果得到相對介電常數約為10。
於電晶體部份做了IG-VG, ID-VD 以及ID-VG等量測方面,在外加閘極電壓為1V時的閘極漏電流密度為5×10-5 A/cm2,電晶體的趨動電流約在數毫安培的範圍。由ID-VG曲線可以萃取出幾項參數,臨限電壓和次臨限織T分別是-0.18 V和214 mV/dec。電晶體的開/關電流比約為104,而通道的載子遷移率為218 cm2/V�泅ec,這個結果和一些受到矚目的高介電常數材料相當。而另外針對元件可靠度的量測透露出氮化鋁閘極場效電晶體的十年生命期的操作電壓為2.4 V,已經足夠應用於實際的電路。由以上的實驗結果顯示,用射頻磁控濺鍍成長氮化鋁薄膜於電晶體的閘極絕緣層與記憶體DRAM介電層之應用上深具潛力。
Abstract
To improve the speed, packing density and performance of integrated circuits, the dimension of devices has been continuously scaled down, it has pushed the structure of conventional MOS devices to its physical limits. Because the thickness of gate dioxide has only a few atom layers, the leakage current resulting from direct tunneling mechanism increases drastically, thus it leads to a power dissipation too large to be accepted, or even worse resulting in the malfunction of devices. Therefore, the search for novel high k materials to serve as alternatives of silicon dioxide as the gate insulator has been very urgent for today’s VLSI technology.
In this thesis, aluminum nitride (AlN) thin film deposited by using RF magnetron sputtering is proposed as an alternative for silicon dioxide. Both Al/AlN/Si and capacitor and field effect transistor have been successfully fabricated. The essential structures and electrical properties of AlN thin film are investigated. XRD, ESCA, AES, and EDS analysis are used to confirm the composition of the AlN film. Results obtained form SEM and TEM cross-section images show that the interface between Si and AlN is in good condition. TEM image is also used to estimate the physical thickness of AlN thin film. AlN films prepared under different sputtering conditions are characterized and analyzed. According to C-V measurement together with the TEM image, it is found that the relative dielectric constant of the sputtered ALN films is of about 10.
The IG-VG, ID-VD and ID–VG characteristics of MISFET are measured. The gate leakage current density of the transistor is about 5×10-5 A/cm2 at 1V. The driving current is at the range of several milliampere. From the ID–VG curve, several parameters have been extracted. The threshold voltage and subthreshold swing are -0.18 V and 214 mV/dec, respectively, the ION/IOFF ratio is about 104, and the channel mobility is about 218 cm2/V�泅ec. These results show that the AlN film is with the same good performances as compared to other high κ materials like HfO2. The reliability of the AlN film is also examined. Experimental results reveal that the maximum voltage of operation for a 10-year-lifetime is around 2.4 V, which is good enough for practical applications. Based on experimental studies conducted in this thesis, it is concluded that both the electrical and physical properties of the sputtered AlN films is suitable for serving a new gate insulator for advanced FETs and and DRAMs.
目錄
中文摘要 ..........................................................ii
英文摘要 ..........................................................iv
致謝 ...........................................................vi
目錄 ..........................................................vii
圖目錄 ...........................................................ix
表目錄 ...........................................................xii
第一章 序論
1.1 積體電路的發展過程...........................................1
1.2 積體電路之微縮規範...........................................2
1.3 目前CMOS微小化時所面臨的技術挑戰.............................4
1.4 本論文的研究動機............................................11
第二章 相關理論
2.1 金屬-絕緣層-半導體場效應電晶體介紹及其元件概念..............13
2.2 高介電係數材料所需之條件....................................22
2.3 氮化鋁的材料特性............................................28
第三章 氮化鋁(AlN)薄膜元件的製備
3.1 射頻磁控濺鍍法的簡介........................................32
3.2 氮化鋁電容製作流程..........................................34
3.3 氮化鋁場效電晶體製作流程....................................39
3.4 量測使用儀器................................................47
第四章 氮化鋁薄膜物性分析
4.1 材料分析儀器介紹............................................50
4.2 薄膜分析結果................................................54
第五章 氮化鋁薄膜電性結果
5.1 Al/ AlN/p-Silicon電容特性...................................65
5.2 N通道MIS場效電晶體的電性量測................................66
5.3 元件可靠度..................................................75
第六章 結論與未來研究
6.1 結論........................................................76
6.2 未來研究之建議..............................................77

參考文獻.............................................................79
參考文獻
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