臺灣博碩士論文加值系統

在本論文中，我們由頻域的觀點來探討射頻積體電路中，元件因耗損性矽基板所產生的雜訊耦合效應。對此，論文分別針對射頻被動元件(電感)及電晶體(MOSFET)所生的雜訊經由矽基板傳導的現象，作分析及模型化。
被動元件部分，我們製作二種不同擺放方法的電感對，並改變其距離，觀察電感所生的基板雜訊耦合效應對距離變化的情況，同時，亦觀察電感受到雜訊耦合後，電感本身特性改變的情形。之後，再由模擬及量測的相互驗證，提出雜訊耦合的等效電路模型，描述基板雜訊的行為。
在電晶體部分，我們可以知道金氧半電晶體的源、汲二極因P-N接面的關係會產生寄生的空乏電容，此一寄生電容會將高頻的雜訊耦合到基板，而使雜訊影響電路工作的準確性。針對此點，我們設計測試鍵來量測高頻雜訊因接面電容耦合到基板的現象。在測試鍵中，我們將P-Well及N-Well中分別打入N-diffusion及 P-diffusion形成空乏電容，同時調整diffusion的距離，並量測雙埠(Two-port)的散射參數(S-parameter)，得知高頻雜訊對距離變化的情況。
最後，這些量測結果及等效模型，將提供給電路設計者，期能經由這些資訊，可讓高頻電路設計更有效率。

In this thesis, the substrate noise coupling effect in the lossy silicon substrate is investigated from the aspect of frequency domain. Therefore, the coupling effect produced by the passive device and MOSFET is also analyzed and modeled.
In the part of passive device, two types of inductor pairs are fabricated and the distance between the inductor pairs is varied to observe the substrate coupling effect with regards to the different distance. Furthermore, the characteristic of inductor changed by coupling effect is also studied. Then, from the measurement and simulation results, an equivalent circuit model of substrate noise coupling effect in the inductor pairs is proposed, too.
In the part of MOS transistor, we study the noise coupling from the source and drain depletion capacitance (formed by the P-N junction). However, these parasitic capacitances would couple the RF noise to substrate and then degrade the performance of RF circuit. From the point of view, the testkey is designed to measure the phenomenon of RF noise coupling effect. In the testkey, the N-diffusion and P-diffusion regions are formed inside the P-well and N-well then induce the junction capacitance. Next, the distance of two diffusion regions is changed and measured the S-parameters to obtain the noise coupling effect for the varying different distance.
Finally, these measurement results and equivalent circuit model would provide to circuit designers and hope the information would let the RF circuit design procedure be more efficient.

CONTENTS
ABSTRACT (CHINESE) I
ABSTRACT (ENGLISH) III
ACKNOWLEDGEMENT............................................V
CONTENTS .VI
TABLE CAPTIONS VIII
FIGURE CAPTIONS IX
CHAPTER 1 Introduction 1
1.1 Motivation 1
1.2 Thesis organization 2
CHAPTER 2 Basic Concepts of the Coupling Effect in Silicon Substrate 3
2.1 Noise coupling in digital circuit 3
2.2 Electromagnetic coupling in Si substrate 5
CHAPTER 3 Investigation of RF Spiral Inductor’s Coupling Effects in Lossy Substrate 7
3.1 Design consideration of a single inductor 7
3.1.1 The fabrication process of the inductor 7
3.1.2 Specification of spiral inductor 10
3.2 Measurement results and modeling of a single inductor 10
3.2.1 Measurement setup 10
3.2.2 De.embedding procedure 11
3.2.3 Measurement results and equivalent circuit model of spiral inductor 13
3.3 Analysis of inductor coupling effects 24
3.3.1 Measurement setup and de.embedding method 24
3.3.2 Measurement results of inductor coupled pairs 27
3.3.3 Discussion about the inaccuracy between measurement and simulation results 30
3.3.4 Modeling of inductor coupled pairs 34
3.4 Comparison with other works 38
3.5 Summary and contributions 40
CHAPTER 4 Substrate Noise Coupling Effect in TSMC 0.18um CMOS Process 41
4.1 Testkey design 41
4.2 Measurement results 43
CHAPTER 5 Conclusion and Future Works 46
5.1 Conclusion 46
5.2 Future works 47
REFERENCES 48
Appendix I Four.Port Transformation 50
Vita 59

[1] D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, “Experimental Result and Modeling Techniques for Substrate Noise in Mixed.signal Integrated Circuits,” IEEE J. Solid-State Circuits, vol. 28, pp. 420-430, Apr. 1993.
[2] T. Gabara, “Reduced Ground Bounce and Improved Latch up Suppression through Substrate Condition,” IEEE J. Solid-State Circuits, vol. 23, pp. 1224-1232, Oct. 1988.
[3] R. B. Merrill, W. M. Young, and K. Brehmer, “Effect of Substrate Material in Mixed Analog/Digital Integrated Circuits,” in Proc. IEEE Int. Electron Devices Meeting, pp. 433-436, San Francisco, CA, Dec. 1994.
[4] J. W. Lin, “An Optimum Design of the Micromachined RF Inductor” Master’s thesis, Dept. of Electronics Engineering and Inst. of Electronics, NCTU, Taiwan, 2004.
[5] Troels Emil Kolding, “On-Wafer Calibration Techniques for giga-hertz CMOS Measurement,” in Proc. ICMTS, pp.105.110, March 1999.
[6] D. M. Polar, Microwave Engineering, Third edition, John Wiley & Sons, Inc., 2005.
[7] C. J. Chao, S. C. Wong, C. H. Kao, M. J. Chen, L. Y. Leu, and K. Y. Chiu, “Characterization and Modeling of On-Chip Spiral Inductors for Si-RFICs,” IEEE Trans. on semiconductor manufacturing, pp. 19-29, Feb. 2002.
[8] T. S. Horng, J. K. Jau, C. H. Huang, and T. Y. Han, “Synthesis of a Super Broadband Model for On-Chip Spiral Inductors,” IEEE RFIC Symposium, pp.453-456, June 2004.
[9] Joonho Gil, and Hyungcheol Shin, “A Simple Wide-Band On-Chip Inductor Model for Silicon-Based RF ICs,” IEEE Trans. Microwave Theory and Techniques, vol. 51, pp. 2023-2028, Step. 2003.
[10] C. J. Chao, S. C. Wong, C. J. Hsu, M. J. Chen, and L. Y. Leu, “Characterization and Modeling of On-Chip Inductor Substrate Coupling Effect,” IEEE RFIC Symposium, pp. 311-314, June 2002.
[11] A. O. Adan, M. Fukumi, K. Higashi, T. Suyma, M. Miyamoto, and M. Hayshi, “Electromagnetic Coupling Effects in RFCMOS Circuits,” IEEE RFIC Symposium, pp. 293-296, June 2002.
[12] M. Werthen, I. Wolff, R. Keller,and W. Bischof, “Investigation of MMIC Inductor Coupling Effect,” IEEE MTT-S International, vol.3, pp. 1793.1796, June 1997.