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研究生:邱大瑜
研究生(外文):DaYu Chiu
論文名稱:通訊系統晶片設計之模擬驗證平台
論文名稱(外文):A Modeling and Verification Platform for Communication SoC Designs
指導教授:黃經堯黃經堯引用關係
指導教授(外文):ChingYao Huang
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:英文
論文頁數:50
中文關鍵詞:模擬驗證平台
外文關鍵詞:simulationverificationplatform
相關次數:
  • 被引用被引用:0
  • 點閱點閱:332
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  • 下載下載:16
  • 收藏至我的研究室書目清單書目收藏:0
在這篇論文中,我們介紹了一個結合了硬體模擬和通訊系統模擬的模擬驗證平台。在系統晶片設計流程中,硬體模擬是一個非常重要的步驟。而通訊系統模擬則是通訊系統研究中不可或缺的工作。這篇論文提出了一個結合了多項功能的平台,包含了硬體模擬,通訊系統模擬,以及軟體發展驗證。對於通訊元件的設計實現,這個將可平台提供一個方便的環境。在論文中,將會對這個平台的各個重要元件的設計理念及工作方法做詳細的描述。
This thesis introduces a development and verification platform that combines hardware modeling and communication system simulation. The hardware modeling is an important technology in SoC design process, and system simulation is an essential process in communication system designs. This proposed platform enables the use of a single platform for multiple-purpose designs for communication system designs, including system simulation, software development and hardware modeling. The platform is especially useful for the designs of communication components whose behaviors are highly coupled with transmission medium and other parallel components. The basic platform components and design strategies are also described in this thesis.
CHAPTER 1 INTRODUCTION 1
1.1 SOC DESIGN PROCESS 1
1.2 HARDWARE MODELING 2
1.3 COMMUNICATION SOC DESIGN 3
1.4 MOTIVATION 5
1.5 ORGANIZATION 5
CHAPTER 2 PLATFORM DESIGN METHODOLOGY 7
2.1 OVERVIEW 7
2.2 EVENT QUEUE 8
2.3 VIRTUAL DEVICES 11
2.4 CHANNEL CONTROLLER 14
2.5 INSTRUCTION SET SIMULATOR 15
2.6 ISS SHELL 16
CHAPTER 3 A CASE EXAMPLE: UWB MAC 18
3.1 OVERVIEW 18
3.2 IEEE 802.15.3 MAC PROTOCOL 18
3.2.1 The 802.15.3 piconet and its components 19
3.2.2 The 802.15.3 Superframe Structure 21
3.2.3 Layer management 23
3.3 MAC FUNCTIONS 24
3.3.1 Overview 24
3.3.2 Stream output buffer 27
3.3.3 CTA Timing Control 28
3.3.4 Send and Wait 30
3.3.5 CAP Timing Control 31
3.4 ARMULATOR 34
3.4.1 A Instruction Set Simulator for ARM 34
3.4.2 Modeling in ARMulator 35
3.5 LINK ARMULATOR WITH THE SYSTEM SIMULATION 37
CHAPTER 4 CONCLUSION AND FUTURE WORKS 40
REFERENCE 41
[1] M. Keating and P. Bricaudr, Reuse Methodology Manual for System-On-A-Chip Designs, Kluwer Academic Publishers, 2002
[2] Silbermintz, M.; Sahar, A.; Peled, L.; Anschel, M.; Watralov, E.; Miller, H.; Weisberger, E.; ”SOC modeling methodology for architectural exploration and software development”, ICECS, pp. 383-386, 2004
[3] Fummi, F.; Martini, S.; Perbellini, G.; Poncino, M.; “Native ISS-SystemC integration for the co-simulation of multi-processor SoC” Design, Automation and Test in Europe Conference and Exhibition, pp. 564-569, 2004
[4] Luca Formaggio; Franco Fummi; Graziano Pravadelli;”A timing-accurate HW/SW co-simulation of an ISS with SystemC” IEEE/ACM/IFIP international conference, pp. 152-157, 2004
[5] Agrawal, A.; Ledeczi, A.;”Multigranular simulation of heterogeneous embedded systems”, Engineering of Computer-Based Systems, pp. 3-10, 2003
[6] Hoffmann, A.; Kogel, T.; Meyr, H.;”A framework for fast hardware-software co-simulation”, Design, Automation and Test in Europe, pp. 760-764, 2001
[7] Andrei Alexandrescu, Modern C++ Design, Addison-Wesley, 2001
[8] Xiao, Z.; Randhawa, T.S.; Hardy, R.H.S.;”A State-Machine Based Design of adaptive Wireless MAC Layer”, Vehicular Technology Conference, pp. 2837-2841 vol.4 2003
[9] ARM Limited, “ARM Developer Suite – Debug Target Guide, Version 1.2”
[10] Oussorov, I.; Raab, W.; Hachmann, U.; Kravtsov, A.; “Integration of Instruction Set Simulators into SystemC High Level Models”, Digital System Design, pp. 126-129, 2002
[11] IEEE Standard for Information technology Telecommunications and information exchange between systems Local and metropolitan area networks Specific requirements Part 15.3: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for High Rate Wireless Personal Area Networks (WPANs).
[12] ARM Application Note 32: The ARMulator [DAI0032E]
[13] ARM Debug Target Guide [DUI0058D]
[14] DaYu, Chiu; YuChen, Sun; ChingYao, Huang;, “A Modeling and Verification Platform for Communication SoC designs”, VLSI/CAD Design 2005.
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