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研究生:吳韻如
研究生(外文):Yun-Ru Wu
論文名稱:考慮光學鄰近修正之繞線研究
論文名稱(外文):Maze Routing with OPC Consideration
指導教授:王廷基
指導教授(外文):Ting-Chi Wang
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:英文
論文頁數:28
中文關鍵詞:實體設計繞線光學鄰近修正
外文關鍵詞:Physical DesignRoutingOPC
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隨著製程技術的進步,製程變異(process variation)亦變得越來越嚴重,尤其當製程技術進入奈米階段,製程變異的問題將更為嚴重而不容忽視。因為當光罩(mask)中線寬尺寸逼近曝光時所用之光波波長時,光線透過光罩後將產生繞射現象,因此當製程技術進步至奈米階段,即線寬極小時,繞射現象將隨著線寬變小而愈為嚴重。繞射光疊加的結果會導致實際呈像與光罩上所設計的圖像間有很大的不同,即產生嚴重的失真。「光學鄰近修正(OPC)」技術便是用來修正曝光後圖像的失真問題,此技術考慮光學效應中之繞射,藉由改變光罩上的圖形,使得曝光後所得之圖像與設計時所期望之圖像相同。然而,由於晶片設計越來越複雜,我們希望能儘早於繞線階段便考慮將來製程中所需面臨的光學效應問題,如此,一方面將有效節省製作光罩時所需之修正時間與花費,另一方面則能夠提早在實體設計階段避免將來製程修正中可能無法處理的情況發生。本篇論文,便是在實體設計之繞線階段,考慮將來製程中光學鄰近修正技術,我們提出兩個考慮光學鄰近修正之繞線問題,並針對此兩個問題分別提出兩個求得最佳解的演算法。
As the technology of manufacturing process continues to advance, the process variation becomes more and more serious in nanometer designs. Optical proximity correction (OPC) is employed to correct the process variation of the diffraction effect. To obtain the desired layout as early as possible, routers must have some changes to handle the optical effects to speed up the OPC time and to avoid the routing result that cannot be corrected by the OPC process. In this thesis, we propose two practical OPC-aware maze routing problems and present how to enhance an existing maze routing algorithm to get an optimal algorithm for each problem. The experimental results are also given to demonstrate the effectiveness of these two enhanced algorithms.
ABSTRACT II
CONTENTS III
LIST OF FIGURES IV
LIST OF TABLES IV
Chapter 1 Introduction 1
Chapter 2 Optical Effect 3
Chapter 3 Preliminaries 6
Chapter 4 Problem Formulations 10
4.1 Problem 1 10
4.2 Problem 2 11
Chapter 5 Algorithms 13
5.1 Algorithm 1 13
5.2 Algorithm 2 18
Chapter 6 Experimental Results 23
Chapter 7 Conclusion 27
REFERENCES 28
[1]T.-C. Chen and Y.-W. Chang, “Multilevel Full-Chip Gridless Routing Considering Optical Proximity Correction,” Proc. Asia and South Pacific Design Automation Conference, 2005, pp. 1160-1163.
[2]P. Gupta and A. B. Kahng, “Manufacturing-Aware Physical Design,” Proc. International Conference on Computer Aided Design, 2003, pp. 681-687.
[3]W. Grobman, M. Thompson, R. Wang, C. Yuan, R. Tian and E. Demircan, “Reticle Enhancement Technology: Implication and Challenges for Physical Design,” Proc. Design Automation Conference, 2001, pp. 73-78.
[4]L.-D. Huang and D. F. Wong, “Optical Proximity Correction (OPC)-Friendly Maze Routing,” Proc. Design Automation Conference, 2004, pp. 186-191.
[5]C. Y. Lee, “An Algorithm for Path Connection and Its Application,” IRE Trans. Electronic Computer, EC-10, 1961.
[6]J. D. Plummer, M. D. Deal and P. B. Griffin, Silicon VLSI Technology, Prentice Hall, 2000.
[7]S. M. Sait and H. Youssef, VLSI Physical Design Automation: Theory and Practice, McGRAW-HILL Book Company 1997, pp. 228-229.
[8]L. K. Scheffer, “Physical CAD Changes to Incorporate Design for Lithography and Manufacturability,” Proc. Asia and South Pacific Design Automation Conference, 2004, pp. 766-771.
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