臺灣博碩士論文加值系統

固態白光光源可以利用不同的方法來產生. 每種方法會以價格，效能及技術需求來評量。固態白光光源的研究及挑戰在學術界或業界不斷的進行著. 本篇論文主要著重於效能及技術需求. 本論文描述現今氮化鎵發光元件製作主要的技術包含長晶，摻雜，電極，蝕刻，封裝。如何製作高效率元件是本論文主要的研究重點。本論文研究提供的改善內部量子效率的解決方案。我們發明一種間斷光源式光輔助化學蝕刻方式製作元件。這種無傷害性蝕刻可以製作非常平坦的氮化鎵蝕刻表面，平坦度為0.37nm。此方法可以製作出平坦，均勻，大面積的氮化鎵蝕刻表面，此種方法可以延伸到p型氮化鎵蝕刻，此種方法可以克服光電化學無法蝕刻p型氮化鎵的限制。光輔助化學蝕刻方式製作的發光元件第一次被成功製作出。另外表面處理的方法也被發展出來。短時間熱氫氧化鉀水溶液處理或是低溫光輔助蝕刻處理。當元件尺寸縮小時蝕刻所造成的傷害是一個關鍵議題.本論文研究提供元件改善光取出效率的解決方案，我們經由光輔助化學蝕刻方式改善氮化物發光元件及磷化物發光元件的光取出效率。本論文研究提供元件改善電力效率的解決方案，p-型氮化鎵的研究議題包含氫萃取及歐姆電擊。如何減少串連電阻及機制討論被清楚的描述。此串連電阻包含p-型氮化鎵材料電阻及接觸電極電阻。討論氮化鎵結構及元件尺寸縮小的效應，當元件尺寸縮小電流擁擠效應將會被抑制。許多本論文研究所發展出的應用被展示，包含數位光源及快速測試方法。在此論文中，多種結構尺寸經由多種方法製造。可以製作出300微米至10奈米的氮化物結構大小。結構大小300微米至4微米的發光元件結構經由黃光微影及蝕刻製作出。經由控制黃光微影時的繞射現象或是過蝕刻金屬光罩，元件的尺寸可以由2微米至0.5微米.氮化鎵的發光元件或p/n二極體平台結構可以被製作出來。100奈米至30nm奈米的氮化鎵可以經由光輔助化學蝕刻方式製作。此結構製作是經由缺陷引起的表面型態。50奈米至10nm奈米的氮化鎵線狀結構可以經有光輔助化學蝕刻方式製作。如何製作氮化鎵奈米發光元件將是未來主要發展方向。當元件尺寸由微米進入奈米時，在製作及模型建立仍然有相當多的挑戰。本論文亦從事結構設計最佳化及覆晶式微米元件熱模擬.研究及發展微米發光元件，奈米發光元件，量子點發光元件製作下世代光源是一個有趣，有價值及挑戰性的工作。

There had various methods to generate the white light of SSL. Each method could be evaluated by cost, performance, and technology requirement. The research and challenge for industry or scientist was still in progress. The thesis was focus on the discussion of performance and technology requirement. The major technology now for III-nitride based LED fabricated including III-Nitride growth, doping, contact, etching and package was presented. How to make the high efficiency device was the research key point in this thesis. The solution was listed below in my research.
² Solution for Improvement of internal quantum efficiency
We invented a photon-assisted wet etching with chopped photon source method for device fabrication. This damage free etching method could produce an ultra-smooth etching surface with RMS=0.37nm in GaN. The smooth, uniform, and broaden etching surface in GaN by ELPEC-CS was achieved. The methods was extended to etching p-type GaN, the physical limitation in photoelectrochemical etching was overcame. The first blue LED fabricated by photon-assisted wet etching method was fabricated. The surface treatment methods were also developed. The surface state was removed by boiled KOH treatment with short time or photon assisted cryogenic etching. The etching damage was the key issue while the device was scale down.
² Solution for Improvement of light extraction efficiency
The light extraction method in the III-Nitride LED and III-Phosphide LED were developed by our photon-assisted wet etching method.
² Solution for Improvement of electrical efficiency
n The p-type GaN issue was considered in hydrogen extraction and ohmic contact. The series resistance included resistance of p-type GaN and contact resistance were reduced and discussed in detail.
n The scale-down effect of the III-Nitride structure and device was discussed. While the device scaling down, the current crowding effect will be suppressed.
Many application of my research were presented including Digital light source and quick testing method. In the thesis, various structure sizes were fabricated by various etching technology. The size of III-Nitride based structure was fabricated from 300mm to 10nm. The LED structure from 300mm to 4mm could be formed by photolithography following by etching. By controlling photolithography in diffraction mode or over etching the metal mask, the size could be reduced from 2mm to 0.5mm. The mesa GaN LED or P/N diode could be fabricated. The nano structure from 100 to 30nm of GaN could be formed due to the dislocation-induced morphology during etching in photo-assisted wet etching. The structure with 50~10nm nano-wire could be fabricated in GaN or p-GaN during photo-assisted wet etching. The micro-LED was successfully fabricated. How to make the nano-LED with scale-down (100~0.1nm for nano scale) for III-Nitride was the major research in the future. The optimized device structure was designed by the commercial software with lattice mismatch control concept. The heat extraction in III-Nitride based flip chip LED and III-Phosphide vertical LED was designed. The scale-down effect of the thermal extracted was designed and discussion.
There still had much challenges for fabricating or modeling while device was scale-down from micro to nano scale (100nm-0.1nm). The research and develop of micro-LED, nano-LED or quantum dot LED for “Next generation light source” was an interested, valuable and challenge work.

CONTENTS
ACKNOWLEDGMENTS iii
ABSTRACT v
中文摘要 vi
CONTENTS viii
CHAPTER 1 INTRODUCTION OF WHITE LIGHT SOURCE………………...1
1.1 HISTORY OF THE LIGHT SOURCE …………………………………..1
1.2 ENERGY ISSUE IN LIGHTING……………………………………………3
1.3 INTRODUCTION AND EFFICIENCY ANALYSIS OF WHITE LED ………………………………………………………………………….6
1.4 EFFICIENCY ANALYSIS OF III-NITRIDE BASED DEVICES ………….8
1.4.1 ISSUE OF INTERNAL QUANTUM EFFICIENCY…………………..8
1.4.1.1 DISLOCATION EFFECT…………………………………………10
1.4.1.1.1 WURTZITE STRUCTURE OF III-NITRIDE……………….11
1.4.1.1.2 SAPPHIRE SUBSTRATE FOR III-NITRIDE GROWTH…11
1.4.1.1.3 STRUCTURE OF THREADING DISLOCATION IN GAN.14
1.4.1.1.4 THREADING DISLOCATION IN III-NITRIDE DEVICE….15
1.4.1.2 PIEZOELECTRIC EFFECT……………………………………..18
1.4.1.3 HIGH ALLOY COMPOSITION EFFECT………………………19
1.4.2 ISSUE ASSOCIATED WITH LIGHT EXTRACTION IN THE III-NITRIDE DEVICE…………………………………………………..20
1.4.3 ISSUE ASSOCIATED WITH HIGH OPERATION VOLTAGE IN THE III-NITRIDE DEVICE……………………………………….………….23
1.5 WHITE LED APPLICATION…………………….………………………..27
CHAPTER 2. THE TECHNOLOGIES IN III-NITRIDE LED………………….28
2.1 TECHNOLOGIES IN CONVENTIONAL III-NITRIDE LED……..………28
2.1.1 SUBSTRATE PREPARED……………………………………..……..29
2.1.2 III-NITRIDE LED HETERO-STRUCTURE GROWTH…….…….…31
2.1.3 TESTING……………………………………………………….………33
2.1.4 STRUCTURE DIMENSION FORMATION……………….…………34
2.1.4.1 PHOTOLITHOGRAPHY…………………………………………34
2.1.4.2 ETCHING…………………………………………………………36
2.1.5 FORMATION OF CONTACT…………………………………………38
2.1.5.1 METALLIZATION…………………………………………………38
2.1.5.2 THERMAL ANNEALING…………………………………………39
2.1.6 PASSIVATION LAYER………………………………………………..40
2.1.7 THIN FILM DEPOSITION…………………………………………….40
2.1.8 THINNING THE SUBSTRATE (CMP)……………………………….40
2.1.9 TESTING………………………………………………………………..41
2.1.10 DEVICE FORMATION……………………………………………….41
2.1.11 DIE ATTACH (CHIPS TESTING)……………………………………41
2.1.12 ASSEMLING AND ENCAPSULATION……………………………..41
2.1.13 I-V-L-T MEASUREMENT…………………………………………….42
2.1.14 HEAT DISPERSION………………………………………………….42
2.1.14.1 FLIP CHIP………………………………………………………..42
2.1.14.2 LASER LIFT OFF………………………………………………..43
2.2 THE CHALLENGES IN HIGH EFFICIENCY III-NITRIDE LED………...44
2.3 OUR APPROACH FOR HIGH EFFICIENCY DEVICE FABRICATION.45
CHAPTER 3. PHOTON-ASSISTED WET ETCHING III-NITRIDE…………...46
3.1 WET ETCHING III-NITRIDE……………………………………………….46
3.2 ELECTROCHEMICAL (EC) ETCHING III-NITRIDE……………………48
3-3. PHOTOELECTROCHEMICAL (PEC) ETCHING III-NITRIDE……….49
3.3.1 PEC ETCHING RATE OF GAN……………………………………..53
3.3.2 PROFILE CONTROL OF PEC ETCHING GAN…………………...55
3.3.3 MORPHOLOGY OF PEC ETCHED GAN……………………….…56
3.3.4 ETCHING DAMAGE OF PEC ETCHED GAN……………………..58
3.3.5 PHOTON EXCITED CATHODE EFFECT IN PEC ETCHING GAN ……………………………………………………………………..59
3.3.6 PEC ETCHING OF INXGA1-XN………………………………………60
3.3.7 PEC ETCHING P-GAN……………………………………………….61
3.4 ELECTROLESS PHOTOELECTROCHEMICAL (ELPEC) ETCHING III-NITRIDE………………………………………………………………...63
3.4.1 ELPEC ETCHING RATE OF GAN………………………………….64
3.5 ELECTROLESS PHOTOELECTROCHEMICAL ETCHING III-NITRIDE WITH A CHOPPED SOURCE ELPEC-CS)………………………..…..…70
3.5.1 ELPEC-CS ETCHINGS OF GAN……………………………..…….70
3.5.2 ELPEC-CS ETCHINGS OF P-GAN………………………………...75
3.5.3 ELPEC-CS ETCHINGS OF MULTI QUANTUM WELL STRUCTURE DIODE………………………………………………………………..…78
3.6 MECHANISM OF PHOTON ASSISTED WET ETCHING………….…82
3.6.1 INTRODUCTION OF THE PHOTON ASSISTED WET ETCHING METHOD………………………………………………………….……82
3.6.2 PROFILE CONTROL OF THE PHOTON ASSISTED WET ETCHING………………………………………………………….…...94
3.6.2.1 PHOTOCURRENT IN PEC ETCHING GAN……………..…..94
3.6.2.2 PROFILE CONTROL IN THE ONE-LAYER MATERIAL……....97
3.6.2.3 PROFILE CONTROL BY SELECTIVITY ETCHING IN THE MULTI-LAYER……………………………………………………..……..…102
CHAPTER 4. DOPING, ACTIVATION AND CONTACT ISSUE IN GAN…..108
4.1 III-NITRIDE GROWTH ON SAPPHIRE SUBSTRATE ………………..108
4.1.1 HIGH QUALITY GAN GROWTH METHOD……………………….108
4.1.2 HIGH TEMPERATURE GAN GROWTH QUALITY IMPROVED WITH LT-BUFFER LAYER METHOD BY MOCVD…………………109
4.1.3 OPTIMIZED CARRIER TRANSPORT IN N-TYPE SILICON-DOPED GAN BY MOCVD………………………………………………………110
4.1.4 OPTIMIZED CARRIER TRANSPORT IN P-TYPE MAGNESIUM- DOPED GAN BY MOCVD…………………………………………….113
4.2 P-TYPE III-NITRIDE ACTIVATION………………………………………118
4.2.1 INTRODUCTION……………………………………………………..118
4.2.2 THERMAL TREATMENT…………………………………………….119
4.2.2.1 H2 AND VACUUM AMBIENT…………………………………..120
4.2.2.2 NON-REACTIVE AMBIENT (N2)………………………………121
4.2.2.3 REACTIVE AMBIENT (O2, AIR)……………………………….123
4.2.2.4 ULTRA-REACTIVE AMBIENT (PLASMA TREATMENT)……124
4.2.3 ENERGETIC PARTICLE EXCITATION…………………………….124
4.2.3.1 LOW ENERGY ELECTRON BEAM IRRADIATION (LEEBI)..125
4.2.3.2 PHOTON (UV, CO2 LASER, MICROWAVE)…………………125
4.2.4 MINORITY CARRIER ENHANCED ACTIVATION………………..126
4.2.5 METAL CATALYST METHOD (NI, CO, PT, PD)…………………..128
4.3 III-NITRIDE CONTACT……………………………………………………133
4.3.1 INTRODUCTION……………………………………………………..133
4.3.2 QUALITATIVE ANALYSIS OF OHMIC CONTACT DESIGN RULES FOR P-TYPE AND N-TYPE GAN……………………………………134
4.3.3 QUANTITATIVE ANALYSIS OF CURRENT TRANSPORT BETWEEN CONTACT AND SEMICONDUCTOR………………...136
4.3.3.1 IDEA METAL-SEMICONDUCTOR CONTACT (SCHOTTKY CONTACT)……………………………………………………….136
4.3.3.2 CONTAMINATION EFFECT (METAL-INSULATOR- SEMICONDUCTOR)……………………………………………139
4.3.3.3 SURFACE STATE EFFECT (METAL-SEMICONDUCTOR AND METAL-INSULATOR-SEMICONDUCTOR)…………………..140
4.3.3.4 DEEP TRAP ASSISTED TUNNELING……………………….142
4.3.4 EXPERIMENTS ANALYSIS OF CONTACT FOR P-TYPE AND N-TYPE GAN………………………………………………………….143
4.3.4.1 SURFACE TREATMENT FOR NON-ALLOYED CONTACT.143
4.3.4.2 N-TYPE GAN ALLOYED OHMIC CONTACT………………..150
4.3.4.2.1 ONE LAYER STRUCTURE (MODEL 1)…………………150
4.3.4.2.2 TWO LAYER STRUCTURE (MODEL 2)………………...151
4.3.4.2.3 THREE LAYER STRUCTURE (MODEL 3)………………151
4.3.4.2.4 FOUR LAYER STRUCTURE (MODEL 4)………………..151
4.3.4.3 P-TYPE GAN ALLOYED OHMIC CONTACT…………………156
4.3.4.3.1 ONE LAYER STRUCTURE (MODEL 1)………………….156
4.3.4.3.2 TWO LAYER STRUCTURE (MODEL 2)…………………157
4.3.4.3.3 THREE LAYER STRUCTURE (MODEL 3)………………158
4.3.4.3.4 FOUR LAYER STRUCTURE (MODEL 4)………………..158
4.3.5 CONTACT RESISTANCE MEASUREMENT………………………163
4.3.6 METAL CATALYST METHOD FOR NON-ALLOYED P-TYPE GAN OHMIC CONTACT………………………………………………….…164
4.3.6.1 SURFACE TREATMENT BY CHEMICAL SOLUTION………164
4.3.6.2 HYDROGEN EXTRACTION BY NI METAL STORAGE METHOD………………………………………………………….167
4.3.6.3 CURRENT TRANSPORT AFTER HYDROGEN EXTRACTION AT VARIOUS ANNEALING TEMPERATURE…………………168
4.3.6.4 THERMAL STABILITY OF THE METAL CATALYST METHOD………………………………………………… ………172
4.3.6.5 INTERFACE REACTION BETWEEN NI AND P-TYPE GAN WITH VARIOUS REACTION TEMPERATURE…………….…174
4.3.6.6 PHOTOLUMINESCENSE (PL) BETWEEN NI AND P-TYPE GAN WITH VARIOUS REACTION TEMPERATURES……….177
4.3.6.7 SUMMARY……………………………………………………….179
4.3.7 SPECIAL DESIGN OF THE P-TYPE OHMIC CONTACT FORMATION PROCESS……………………………………………..180
4.4 THERMAL ANNEALING UNDER BIAS FOR P-GAN…………………183
4.4.1 BIAS-ASSISTED ACTIVATION OF P-GAN AT LOW TEMPERATURE IN AIR………………………………………………183
4.4.2 DISCUSSION ABOUT THE MECHANISM OF "BIAS-ASSISTED ACTIVATION OF P-GAN AT LOW TEMPERATURE IN AIR”………………………………………………………………..…….195
4.4.2.1 FORWARD BIAS REGION…………………………….……….195
4.4.2.2 ELECTRICAL FIELD REGION…………………………………195
4.4.2.3 REVERSED BIAS REGION……………………………………196
CHAPTER 5.QUICK TEST METHOD DEVELOPMENT…………………….197
5.1INTRODUCTION………………………………………..…………………197
5.2 PHOTOELECTROCHEMICAL ETCHING WITH METAL MASK…….198
5.3 WET CLEAN……………………………………………………………….199
5.4 TESTING WITH INDIUM COATING TIP UNDER ELEVATED TEMPERATURE……………………………………………………...…..200
5.5 CONCLUSION……………………………………………………………..204
CHAPTER 6. DEVICE FABRICATION BY ROUGHING TECHNOLOGY…205
6.1 SURFACE AND SIDEWALL ROUGHENING OF GAN-BASED STRUCTURES WITH PHOTON-ASSISTED WET ETCHING………205
6.2 ROUGHING FOR THE DEVICE…………………………………………218
6.2.1 TOTAL ROUGH STRUCTURE FOR GAN BASED BLUE LED…218
6.2.2 POROUS STRUCTURE FOR ALGAINP RED LED………………232
6.2.3 SURFACE ROUGH FOR P-SIDE DOWN GAN BASED LED…...240
6.2.3.1 INTRODUCTION OF LASER LIFT OFF………………………240
6.2.3.1.1 LASER ABLATION………………………………………….240
6.2.3.1.2 LASER INDUCED THERMAL DECOMPOSITION BETWEEN SAPPHIRE AND GAN BASED FILM (LASER LIFT OFF METHOD (LLO))………………………………………………245
6.2.3.1.2.1 FILM PROPERTIES AFTER LLO…………………….247
6.2.3.1.2.2 BONDING TRANSFER PROCESS WITH LLO TECHNIQUE FOR LED……………………………….248
6.2.3.2 ROUGH PROCESS OF THE P-SIDE DOWN STRUCTURE LED………………………………………………………………...255
CHAPTER 7. DIGITAL LIGHT SOURCE DEMONSTRATION……………...261
7.1 RGB LED…………………………………………………………………...261
7.2 DIGITAL LIGHT SOURCE SYSTEM…………………………………….265
7.3 DISCUSSION………………………………………………………………269
CHAPTER 8. STRUCTURE SCALE-DOWN FOR III-NITRIDE LED……………………………………………………………….………...……270
8.1 THE MICRO AND NANO STRUCTURE OF III-NITRIDE FABRICATED BY PHOTON ASSISTED WET ETCHING METHOD…………………270
8.1.1 MICRO SCALE STRUCTURE FABRICATION……………………270
8.1.1.1 PEC ETCHING…………………………………………………..271
8.1.1.2 ELPEC-CS ETCHING…………………………………………..272
8.1.1.3 BELPEC-CS ETCHING…………………………………………275
8.1.1.4 BTELPEC-CS ETCHING………………………………………..277
8.1.1.5 ICP ETCHING……………………………………………………288
8.1.2 NANO SCALE STRUCTURE FABRICATION……………………..294
8.1.2.1 PEC ETCHING…………………………………………………..294
8.1.2.2 ELPEC ETCHING……………………………………………….297
8.1.2.3 ELPEC-CS ETCHING…………………………………………..298
8.1.3 QUANTUM SCALE STRUCTURE FABRICATION……………….298
8.1.3.1 ELPEC-CS ETCHING…………………………………………..298
8.2 SUMMARY…………………………………………………………………300
CHAPTER 9 OPTIMIZED DESIGN PROCEDURE FOR HIGH EFFICIENCY LED.………………………………………….…………………………..……….301
9.1 INTRODUCTION…………………………………………………………301
9.2 DETERMINED EMISSION WAVELENGTH……………………………303
9.3 DETERMINED MULTI-QUANTUM WELL COMPOSITION AND THICKNESS…………………………………………………………………305
9.4 DETERMINED THE WAVE GUIDE LAYER OR BUFFER LAYER FOR CLADDING LAYER…………………………………………………………319
9.5 DETERMINED THE CLADDING LAYER…………………..…………..325
9.6 DETERMINED THE CONTACT LAYER……………………………..…331
9.7 LED DEVICE PROPERTIES……………………………………….……333
9.8 OPTIONAL DEVICE PROPERTIES WITH DISLOCATION EFFECT.334
9.9 OPTIONAL DEVICE PROPERTIES WITH TEMPERATURE EFFECT……………………………………………………………………….337
CHAPTER 10 THERMAL ANALYSIS WITH SCALE DOWN……………..361
10.1 THE TEMPERATURE EFFECT IN DEVICE EFFICIENCY…….….361
10.2 THE THERMAL RESISTANCE MODEL OF THE LED………….…362
10.3 THE PHYSICAL MODEL OF THE HEAT EQUATION………….…..362
10.4 THE DEVICE STRUCTURE FOR SIMULATION…………….……..364
10.5 THE THERMAL SIMULATION WITH DEVICE STRUCTURE SCALE DOWN…………………………………………….………………….…..371
CHAPTER 11 CONCLUSIONS………………………..………………………376
BIBLIOGRAPHY…………………………………………………………………378

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