臺灣博碩士論文加值系統

本篇論文探討氮化矽(SiNx)薄膜中以不同矽含量原子條件分別在MONOS NVM所成現的特性為何，此薄膜成長所須的氣體有別於現今常用成長氣體(pure SiH4 or SiH2Cl2+ NH3 @ High temperature ambient)， 利用稀釋於氬氣(95%)中的Silane(5%)與氮氣(99.9999%)做反應氣體，成長溫度為室溫或300。C，隨著氮氣反應氣體流量的變化，所成長出來的氮化矽(SiNx)薄膜，矽含量也跟著變化。
電性方面探討是以NVM特性為主，如﹕起使電壓，寫入/擦拭效能，資料保存的能力，以及重覆寫入/擦拭的能力。因為所製作出來的閘極ONO厚度偏厚(min. ~ 800Å) ，因此利用FN穿隧效應做為寫入/擦拭的機制。我們發現一些特性: 1.起使電壓隨著氮氣流量增加而增加，這是因為等效閘級氧化層(EOT)隨著氮氣流量增加而增加原故。2.寫入/擦拭的臨界電壓差(�幀T)，會隨著氮氣流量上升而減少。3.重覆寫入/擦拭的能力(Endurance)與氮氣流量並無具體關係，這是因為均勻性FN穿隧效應做為寫入/擦拭機制的原故。4. 資料保存的能力會隨著氮氣流量增加而增加。

In this thesis, we studied the characteristics of Si rich silicon nitride/silicon crystal film in MONOS NVM application. We produced Si rich silicon nitride/silicon crystal film by PECVD and the precursor gas are the mixture of silane diluted to a concentration of 5% in argon and nitrogen gas at purity in excess of 99.9999% under room temperature or 300C ambience. We kept the SiH4 precursor gas flow at 40 sccm and changed the N2 precursor gas flow rates for varying the Si content in SiNx thin film.
In electrical characteristics measurement, we measured the initial threshold voltage, program/erase performance, endurance (program/erase cycle), and data retention. Because of the thick ONO stack film (min. ~800 Å), we used the uniform FN tunneling mechanism for program/erase. We found some characteristics are as follows.
1.The initial Vt is increased with raising N2 precursor gas flow rates. This is due to EOT (equipment gate oxide thickness) increased in less Si content of SiNx thin film.
2.The program/erase window (�幀T) is increased with reducing N2 precursor gas flow rates.
3.The endurance performance is less sensitivity with N2 precursor gas flow rates. This is due to uniform FN program/erase mechanism.
4.The data retention performance is improved with raising N2 precursor gas flow rates.

Chinese abstract
English abstract
Chap. 1 Introduction 1
Chap. 2 Operation and Mechanisms
Basic programming mechanism 5
Fowler-Nordheim(FN) tunneling 6
Modified Fowler-Nordheim(FN) tunneling 8
Trap-assisted tunneling 9
Hot-carrier injection 10
Lucky-electron Model 11
The effective electron temperature model 13
Basic erase mechanism 15
UV erase 16
Fowler-Nordheim(FN) tunneling 17
Band to Band Hot hole injection 18
Reverse read operation 18
NVM reliability 20
The endurance characteristics 21
Endurance characteristics in floating gate NVM 21
Endurance characteristics in two bits per cell of NROM NVM 23 The retention characteristics 25
Retention characteristics in floating gate NVM 25
Retention characteristics in two bits per cell of NROM NVM 26
Hole lateral migration in nitride layer issue 30

Chap. 3 Experiment and Process flow 32

Chap. 4 Experiment Results and Discussion
Measurement system 42
Basic device characteristics
The initial Vt distribution 44
Channel Hot Electron injection experiment 46
Program 48
Erase 53
Endurance 57
Data retention 59
Chap. 5 Conclusions 64
References 66

[1-1] Kahng, D. and Sze, S. M. (1967) A floating gate and its application to memory devices. Bell Systems Technical Journal. 46, 1283
[1-2] Wegener, H. A. R, Lincoln, A. J., Pao, H. C., O'Connell, M. R., and Oleksiak, R. E. (1967) The variable threshold transistor, a new electrically alterable, non-destructive read-only storage device. IEEE IEDM Technical Digest. 1.
[1-3] F.R Libsch, A. Roy, and M.H. White, “Charge transport and storage of low programming voltage SONOS/MONOS memory devices,” Sol. State Elect., Vol 33, no. 1, p. 105,1990.
[2-1] Yeargain, J. and Kuo, K. (1981) A high density floating gate EEPROM cell. IEEE IEDM Technical Digest. 24.
[2-2] Guterman, D., Rimawi, I., Chiu, T., Halvorson, R., and McElroy, D. (1979) An electrically alterable nonvolatile memory cell using a floating gate structure. IEEE Transactions on Electron Devices. ED-26, 576.
[2-3] H.Bachhofer, H. Resinger, E. Bertagnolli, Hvon Philipsborn, “Transient conduction in multidielectric silicon-oxide-nitride-oxide semiconductor structures“ Journal of Applied Physics. 89, (5). 2001.
[2-4] Lezlinger, M. and Snow, E. H. (1969) Fowler-Nordheim tunneling in thermally grown SiO2. Journal of Applied Physics. 40, 278.
[2-5] M.L. French and M.H. White, Solid-State Electron. 37,1913 (1994)
[2-6] C. Svensson, I. Lundstro¨m, J. Appl. Phys. 44, 4657 ~1973.
[2-7] Tam, S., Ko, P., and Hu, C. (1984) Lucky-electron model of channel hot-electron injection in MOSFET's. IEEE Transactions on Electron Devices. ED-31, 1116.
[2-8] Takeda, E., Kume, H., Toyabe, T., and Asai, S. (1982) Submicrometer MOSFET structure for minimizing hot-carrier generation. IEEE Transactions on Electron Devices. ED-29, 611.
[2-9] Shockley, W. (1961) Problems related to p-n junctions in silicon. Solid-State Electronics. 2, 35.
[2-10] M. S. Liang and T.C. Lee, “ A Hot Hole Erasable Memory Cell “ IEEE Electron Device Lett,. Vol EDL-7,1986,pp.463.
[2-11] Harari, E. (1978) Dielectric breakdown in electrically stressed thin films of thermal SiO2. Journal of Applied Physics. 49, 2478.
[2-12] Modelli, A. and Ricco, B. (1984) Electric field and current dependence of SiO2 intrinsic breakdown. IEEE IEDM Technical Digest. 148.
[2-13] Shiner, R. E. (1980) Data retention in EPROMs. Proceedings IRPS. 238.
Data retention
[2-14] P. Pavan, R. Bez, P. Olivio, and E. Zanoni, “Flash memory cells—An overview,” Proc. IEEE, vol. 85, no. 8, pp. 1248–1271, Aug. 1997. Flash Memories, pp. 207–217. Ed. P. Cappelletti, C. Golla, P. Olivio, and E. Zanoni. Boston, MA: Kluwer, 1999.
[2-15] Lundkvist L, Lundstrom I, Svensson C. Discharge of MNOS structures. Solid State Electron 1973;16(7):811–23.
[2-16] Lundkvist L, Svensson C, Hansson B. Discharge of MNOS structures at elevated temperatures. Solid State Electron 1976;19(3):221–7
[2-17] Lehovec K, Fedotowsky A. Charge retention of MNOS devices limited by Frenkel–Poole detrapping. Appl Phys Lett 1978;32(5): 335.
[2-18] White MH, Cricchi JR. Characterization of thin-oxide MNOS memory transistors. IEEE Trans Electron Dev 1972;ED-19(12): 1280–8.
[2-19] Miller SL, McWhorter PJ. A predictive model of electron and hole decay in silicon–nitride–oxide–silicon nonvolatile memory transistors experiencing arbitrary thermal environments. J Appl Phys 1991;70(8):4569–76.
[2-20] Roy A, White MH. Determination of the trapped charge distribution in scaled silicon nitride MONOS nonvolatile memory devices by tunneling spectroscopy. Solid State Electron 1991; 34(10):1083–9.
[2-21] Hu Y, White MH. Charge retention in scaled SONOS nonvolatile semiconductor memory devices-modeling and characterization. Solid State Electron 1993;36(10):1401.
[2-22] Yang Y, White MH. Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures. Solid State Electron 2000;44:949–58.
[2-23] Wrazien SJ et al.. Characterization of SONOS oxynitride nonvolatile semiconductor memory devices. Solid State Electron 2003; 47:885–1.
[2-24] A. Shappir, Y. Shacham-Diamand, E. Lusky, I. Bloom, and B. Eitan, “Spatial characterization of localized charge trapping and charge redistribution in NROM devices,” presented at the ESSDERC Workshop on Nonvolatile Memories with Discrete Storage Nodes, Sept. 2003.
[2-25] E. Lusky, Y. Shacham-Diamand, I. Bloom, and B. Eitan, “Electron retention model for localized charge in oxide-nitride-oxide (ONO) dielectric,” IEEE Electron Device Lett., 23, 556–558, 2002.
[2-26] “Lateral charge transport in the nitride layer of the NROM nonvolatile memory device,” in Proc. INFOS Microelectronic Engineering, 72, 2004, 426–433.